SCALLER: Standard Cell Assembled and Local Layout Effect-based Ring Oscillators

TL;DR

This paper introduces a novel technique for fine frequency tuning of ring oscillators in 65nm CMOS, utilizing local layout effects and standard-cell design to achieve high tunability and process variation robustness.

Contribution

It presents a new method leveraging local layout effects for precise frequency tuning in ring oscillators, compatible with standard-cell design.

Findings

Achieved 80-900MHz frequency range in fabricated ROs.

Demonstrated tuning steps as small as 90KHz.

Validated robustness against process variations.

Abstract

This letter presents a technique that enables very fine tunability of the frequency of Ring Oscillators (ROs). Multiple ROs with different numbers of tunable elements were designed and fabricated in a 65nm CMOS technology. A tunable element consists of two inverters under different local layout effects (LLEs) and a multiplexer. LLEs impact the transient response of inverters deterministically and allow to establish a fine tunable mechanism even in the presence of large process variation. The entire RO is digital and its layout is standard-cell compatible. We demonstrate the tunability of multi-stage ROs with post-silicon measurements of oscillation frequencies in the range of 80-900MHz and tuning steps of 90KHz