Deep Learning based Performance Testing for Analog Integrated Circuits
Jiawei Cao, Chongtao Guo, Hao Li, Zhigang Wang, Houjun Wang, and, Geoffrey Ye Li

TL;DR
This paper introduces a deep learning framework for performance testing of analog integrated circuits that reduces testing costs while maintaining accuracy by intelligently selecting test modules and combining their predictions.
Contribution
The paper presents a novel deep learning-based method that minimizes test modules and guarantees accuracy in analog circuit testing, using a combination of neural networks and optimization.
Findings
Reduces number of test modules needed for testing.
Maintains high accuracy in circuit performance estimation.
Validates approach through simulation results.
Abstract
In this paper, we propose a deep learning based performance testing framework to minimize the number of required test modules while guaranteeing the accuracy requirement, where a test module corresponds to a combination of one circuit and one stimulus. First, we apply a deep neural network (DNN) to establish the mapping from the response of the circuit under test (CUT) in each module to all specifications to be tested. Then, the required test modules are selected by solving a 0-1 integer programming problem. Finally, the predictions from the selected test modules are combined by a DNN to form the specification estimations. The simulation results validate the proposed approach in terms of testing accuracy and cost.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsVLSI and Analog Circuit Testing · Integrated Circuits and Semiconductor Failure Analysis · Advancements in Semiconductor Devices and Circuit Design
