Wavefront Threading Enables Effective High-Level Synthesis

TL;DR

Kanagawa is a new high-level language that combines the productivity of traditional HLS with the expressibility and efficiency of RTL design, simplifying hardware development.

Contribution

It introduces Kanagawa, a language that bridges high-level programming and efficient hardware synthesis with a concise syntax and hardware-friendly execution model.

Findings

Enables efficient hardware design from high-level code

Simplifies the hardware development process

Achieves hardware efficiency comparable to RTL

Abstract

Digital systems are growing in importance and computing hardware is growing more heterogeneous. Hardware design, however, remains laborious and expensive, in part due to the limitations of conventional hardware description languages (HDLs) like VHDL and Verilog. A longstanding research goal has been programming hardware like software, with high-level languages that can generate efficient hardware designs. This paper describes Kanagawa, a language that takes a new approach to combine the programmer productivity benefits of traditional High-Level Synthesis (HLS) approaches with the expressibility and hardware efficiency of Register-Transfer Level (RTL) design. The language's concise syntax, matched with a hardware design-friendly execution model, permits a relatively simple toolchain to map high-level code into efficient hardware implementations.