Exploring and Evaluating Real-world CXL: Use Cases and System Adoption
Xi Wang, Jie Liu, Jianbo Wu, Shuangyan Yang, Jie Ren, Bhanu Shankar, Dong Li

TL;DR
This paper investigates the performance and use cases of emerging CXL memory technology, analyzing real hardware to understand its impact on applications like HPC and LLMs, and proposing a new data interleaving policy.
Contribution
It provides the first detailed performance characterization of genuine CXL memory cards and introduces a novel data object-level interleaving policy for optimized memory access.
Findings
CXL memory improves application performance in specific scenarios.
Memory tiering and interleaving significantly affect CXL memory efficiency.
The proposed interleaving policy matches access patterns, enhancing performance.
Abstract
Compute eXpress Link (CXL) is emerging as a promising memory interface technology. However, its performance characteristics remain largely unclear due to the limited availability of production hardware. Key questions include: What are the use cases for the CXL memory? What are the impacts of the CXL memory on application performance? How to use the CXL memory in combination with existing memory components? In this work, we study the performance of three genuine CXL memory-expansion cards from different vendors. We characterize the basic performance of the CXL memory, study how HPC applications and large language models (LLM) can benefit from the CXL memory, and study the interplay between memory tiering and page interleaving. We also propose a novel data object-level interleaving policy to match the interleaving policy with memory access patterns. Our findings reveal the challenges and…
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Taxonomy
TopicsReal-Time Systems Scheduling
