Faster Linear-Size And-Or Path and Adder Circuits
Ulrich Brenner, Anna Silvanus

TL;DR
This paper introduces a new algorithm for constructing faster, smaller linear-size adder circuits with improved depth, approaching theoretical lower bounds, and presents the first linear-size And-Or path circuits matching lower bound depth.
Contribution
It presents a novel algorithm for linear-size adder and And-Or path circuits with significantly improved depth and construction time, nearing theoretical lower bounds.
Findings
Adder circuits with depth $oxed{ ext{at most } extstyle{ ext{log}_2 n + ext{log}_2 ext{log}_2 n + ext{log}_2 ext{log}_2 ext{log}_2 n + ext{const}}}$
And-Or path circuits with linear size and depth close to the lower bound $ extstyle{ ext{log}_2 m + ext{log}_2 ext{log}_2 m + 0.65}$
Construction time of $oxed{ ext{O}(m ext{log}_2 m)}$ for And-Or path circuits
Abstract
We consider the fundamental problem of constructing fast and small circuits for binary addition. We propose a new algorithm with running time for constructing linear-size -bit adder circuits with a significantly better depth guarantee compared to previous approaches: Our circuits have a depth of at most , improving upon the previously best circuits by [12] with a depth of at most . Hence, we decrease the gap to the lower bound of by [5] significantly from to . Our core routine is a new algorithm for the construction of a circuit for a single carry bit, or, more generally, for an And-Or path, i.e., a Boolean function…
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Taxonomy
TopicsLow-power high-performance VLSI design · Quantum Computing Algorithms and Architecture · Parallel Computing and Optimization Techniques
