A Comprehensive Survey on SmartNICs: Architectures, Development Models, Applications, and Research Directions

TL;DR

This survey comprehensively reviews SmartNIC architectures, development models, applications, and future research directions, highlighting their role in overcoming processor performance limitations and offloading diverse network functions.

Contribution

It provides the first extensive taxonomy of SmartNIC applications and discusses challenges, initiatives, and open issues in SmartNIC development and deployment.

Findings

SmartNICs integrate heterogeneous processors for diverse tasks.

SmartNICs offer advantages over legacy NICs in performance and flexibility.

Open research issues include development challenges and deployment hurdles.

Abstract

The end of Moore's Law and Dennard Scaling has slowed processor improvements in the past decade. While multi-core processors have improved performance, they are limited by the application's level of parallelism, as prescribed by Amdahl's Law. This has led to the emergence of domain-specific processors that specialize in a narrow range of functions. Smart Network Interface Cards (SmartNICs) can be seen as an evolutionary technology that combines heterogeneous domain-specific processors and general-purpose cores to offload infrastructure tasks. Despite the impressive advantages of SmartNICs and their importance in modern networks, the literature has been missing a comprehensive survey. To this end, this paper provides a background encompassing an overview of the evolution of NICs from basic to SmartNICs, describing their architectures, development environments, and advantages over legacy NICs. The paper then presents a comprehensive taxonomy of applications offloaded to SmartNICs, covering network, security, storage, and machine learning functions. Challenges associated with SmartNIC development and deployment are discussed, along with current initiatives and open research issues.