Characterisation and simulation of stitched CMOS strip sensors

TL;DR

This paper explores the development and characterization of stitched CMOS strip sensors for high-energy physics, demonstrating that stitching does not impair efficiency and providing insights into electric field effects through simulation and testing.

Contribution

It introduces the use of stitching in CMOS strip sensors, enabling large-area coverage without loss of performance, and combines experimental and simulation analyses.

Findings

Stitched sensors maintain high hit detection efficiency.

Electric field analysis reveals charge carrier behavior.

Simulations align with experimental measurements.

Abstract

In high-energy physics, there is a need to investigate alternative silicon sensor concepts that offer cost-efficient, large-area coverage. Sensors based on CMOS imaging technology present such a silicon sensor concept for tracking detectors. The CMOS Strips project investigates passive CMOS strip sensors fabricated by LFoundry in a 150nm technology. By employing the technique of stitching, two different strip sensor formats have been realised. The sensor performance is characterised based on measurements at the DESY II Test Beam Facility. The sensor response was simulated utilising Monte Carlo methods and electric fields provided by TCAD device simulations. This study shows that employing the stitching technique does not affect the hit detection efficiency. A first look at the electric field within the sensor and its impact on generated charge carriers is being discussed.