A Second-Order Audio VCO-ADC with 103-dB-A Dynamic Range and Binary-Weighted Internal Architecture

TL;DR

This paper presents a second-order audio VCO-ADC with a novel binary-weighted internal architecture that achieves a 103-dB dynamic range, improved complexity, and area efficiency over prior True-VCO designs.

Contribution

It introduces a second-order VCO-ADC using binary and Gray encoding for state variables, surpassing previous dynamic range limitations without increasing complexity.

Findings

Achieved 103 dB dynamic range in a 130 nm CMOS chip.

Realized a peak SNDR of 76.5 dB-A at 250 μW power.

Reduced chip area and complexity compared to prior architectures.

Abstract

One of the limitations of conventional VCO-ADCs is the restriction to first-order noise shaping. True-VCO architectures have been proposed to increase the noise-shaping order by cascading several VCO integrators, but without requiring analog feedback loops. A high noise shaping order allows to reduce the input VCO frequency compared to a conventional VCO-ADC with similar dynamic range, which improves power consumption. Prior-art True-VCO architectures represent state variables either with a thermometer code or with a single-bit. Thermometer encoding is a natural choice when ring oscillators are selected as loop filter integrators. However, chip area restrictions force thermometer-encoded state variables to have few levels. A reduced number of levels in the state variables limits the dynamic range of True VCO-ADCs. In this paper, we show experimentally a second-order audio VCO-based ADC which uses ring oscillators as integrators but employs Gray and binary encoding for state variables. As a consequence, the complexity and area of the True-VCO architecture is reduced, breaking the barrier that limits the dynamic range of prior designs. The implemented chip shows a dynamic range of 103~dB achieving a peak SNDR of 76.5 dB-A with a power of 250 $\mu$W occupying 0.095 $\text{mm}^2$ in 130 nm CMOS.