LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust

TL;DR

This paper reviews the integration of large language, multimodal, and circuit models in chip design, highlighting security risks and proposing strategies to build trust in LxM-based design processes.

Contribution

It provides a comprehensive overview of LxMs in chip design and addresses critical security and trust issues from attack and defense perspectives.

Findings

LxMs are increasingly used for automating hardware description and design tasks.

Security risks associated with LxMs in chip design are identified and initial defenses are discussed.

The paper emphasizes the importance of trust-building in adopting LxMs for hardware development.

Abstract

Chip design is about to be revolutionized by the integration of large language, multimodal, and circuit models (collectively LxMs). While exploring this exciting frontier with tremendous potential, the community must also carefully consider the related security risks and the need for building trust into using LxMs for chip design. First, we review the recent surge of using LxMs for chip design in general. We cover state-of-the-art works for the automation of hardware description language code generation and for scripting and guidance of essential but cumbersome tasks for electronic design automation tools, e.g., design-space exploration, tuning, or designer training. Second, we raise and provide initial answers to novel research questions on critical issues for security and trustworthiness of LxM-powered chip design from both the attack and defense perspectives.