FloorSet -- a VLSI Floorplanning Dataset with Design Constraints of Real-World SoCs
Uday Mallappa, Hesham Mostafa, Mikhail Galkin, Mariano Phielipp,, Somdeb Majumdar

TL;DR
FloorSet provides large-scale, realistic benchmark datasets for VLSI floorplanning, facilitating research on constrained optimization problems and improving reproducibility in machine learning approaches for SoC design.
Contribution
The paper introduces FloorSet, comprehensive synthetic datasets with real-world constraints for VLSI floorplanning, addressing reproducibility and scalability issues in ML-based optimization research.
Findings
Two datasets with 1 million training samples each
Inclusion of real-world design constraints in datasets
Open-source availability for research community
Abstract
Floorplanning for systems-on-a-chip (SoCs) and its sub-systems is a crucial and non-trivial step of the physical design flow. It represents a difficult combinatorial optimization problem. A typical large scale SoC with 120 partitions generates a search-space of nearly 10E250. As novel machine learning (ML) approaches emerge to tackle such problems, there is a growing need for a modern benchmark that comprises a large training dataset and performance metrics that better reflect real-world constraints and objectives compared to existing benchmarks. To address this need, we present FloorSet -- two comprehensive datasets of synthetic fixed-outline floorplan layouts that reflect the distribution of real SoCs. Each dataset has 1M training samples and 100 test samples where each sample is a synthetic floor-plan. FloorSet-Prime comprises fully-abutted rectilinear partitions and near-optimal…
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Taxonomy
TopicsVLSI and FPGA Design Techniques · Embedded Systems Design Techniques · Manufacturing Process and Optimization
