FPGA Digital Dice using Pseudo Random Number Generator

TL;DR

This paper presents a FPGA-based digital dice device that uses a pseudo-random number generator seeded by a tilt sensor to simulate various dice with different numbers of sides.

Contribution

It introduces a hardware implementation of a digital dice with real-time display, using a PRNG seeded by tilt sensor input, integrated in a 3D printed casing.

Findings

Successfully generates random dice numbers in real-time

Supports multiple dice configurations (2, 4, 6, 8, 10, 12, 20, 100)

Demonstrates practical FPGA implementation of a digital gaming device

Abstract

The goal of this project is to design a digital dice that displays dice numbers in real-time. The number is generated by a pseudo-random number generator (PRNG) using XORshift algorithm that is implemented in Verilog HDL on an FPGA. The digital dice is equipped with tilt sensor, display, power management circuit, and rechargeable battery hosted in a 3D printed dice casing. By shaking the digital dice, the tilt sensor signal produces a seed for the PRNG. This digital dice demonstrates a set of possible random numbers of 2, 4, 6, 8, 10, 12, 20, 100 that simulate the number of dice sides. The kit is named SUTDicey.