High-coherence superconducting qubits made using industry-standard, advanced semiconductor manufacturing

TL;DR

This paper demonstrates the first superconducting transmon qubits fabricated in a 300 mm CMOS industrial process, achieving coherence times over 100 microseconds and comparable performance to traditional methods, enabling scalable quantum computing.

Contribution

It introduces an industry-scale fabrication process for superconducting qubits using CMOS manufacturing, maintaining high coherence and yield, and paving the way for scalable quantum processors.

Findings

Superconducting qubits fabricated in a 300 mm CMOS line exceed 100 microseconds coherence.

The industrial process yields performance comparable to laboratory techniques.

Large-scale statistics confirm the process's viability for scalable quantum computing.

Abstract

The development of superconducting qubit technology has shown great potential for the construction of practical quantum computers. As the complexity of quantum processors continues to grow, the need for stringent fabrication tolerances becomes increasingly critical. Utilizing advanced industrial fabrication processes could facilitate the necessary level of fabrication control to support the continued scaling of quantum processors. However, these industrial processes are currently not optimized to produce high coherence devices, nor are they a priori compatible with the commonly used approaches to make superconducting qubits. In this work, we demonstrate for the first time superconducting transmon qubits manufactured in a 300 mm CMOS pilot line, using industrial fabrication methods, with resulting relaxation and coherence times already exceeding 100 microseconds. We show across-wafer, large-scale statistics studies of coherence, yield, variability, and aging that confirm the validity of our approach. The presented industry-scale fabrication process, using exclusively optical lithography and reactive ion etching, shows performance and yield similar to the conventional laboratory-style techniques utilizing metal lift-off, angled evaporation, and electron-beam writing. Moreover, it offers potential for further upscaling by including three-dimensional integration and additional process optimization using advanced metrology and judicious choice of processing parameters and splits. This result marks the advent of more reliable, large-scale, truly CMOS-compatible fabrication of superconducting quantum computing processors.