A Novel Computing Paradigm for MobileNetV3 using Memristor

TL;DR

This paper introduces a memristor-based hardware design for MobileNetV3 that significantly reduces energy consumption and inference time, enabling efficient deep learning on edge devices.

Contribution

It presents a novel memristor-based circuit architecture tailored for MobileNetV3, optimizing performance for resource-constrained environments.

Findings

Achieves over 90% accuracy on CIFAR-10

Reduces inference time compared to traditional implementations

Decreases energy consumption significantly

Abstract

The increasing computational demands of deep learning models pose significant challenges for edge devices. To address this, we propose a memristor-based circuit design for MobileNetV3, specifically for image classification tasks. Our design leverages the low power consumption and high integration density of memristors, making it suitable for edge computing. The architecture includes optimized memristive convolutional modules, batch normalization modules, activation function modules, global average pooling modules, and fully connected modules. Experimental results on the CIFAR-10 dataset show that our memristor-based MobileNetV3 achieves over 90% accuracy while significantly reducing inference time and energy consumption compared to traditional implementations. This work demonstrates the potential of memristor-based designs for efficient deployment of deep learning models in resource-constrained environments.