Optimal Synthesis of Finite State Machines with Universal Gates using Evolutionary Algorithm

TL;DR

This paper introduces an evolutionary algorithm-based method for synthesizing finite state machines that significantly reduces circuit area and gate count, demonstrated on benchmark circuits.

Contribution

It presents a novel evolutionary approach using Cartesian Genetic Programming for FSM synthesis, achieving substantial gate reduction and analyzing parameter effects.

Findings

Approximately 30% reduction in total gates

Effective evolutionary process for FSM synthesis

Insights into parameter impacts on evolution

Abstract

This work presents an optimization method for the synthesis of finite state machines. The focus is on the reduction in the on-chip area and the cost of the circuit. A list of finite state machines from MCNC91 benchmark circuits have been evolved using Cartesian Genetic Programming. On the average, almost 30% of reduction in the total number of gates has been achieved. The effects of some parameters on the evolutionary process have also been discussed in the paper.