REFRESH FPGAs: Sustainable FPGA Chiplet Architectures
Peipei Zhou, Jinming Zhuang, Stephen Cahoon, Yue Tang and, Zhuoping Yang, Xingzhen Chen, Yiyu Shi, Jingtong Hu, Alex K., Jones

TL;DR
This paper proposes REFRESH FPGAs, a sustainable FPGA architecture using retired FPGA dies and 2.5D integration, aiming to reduce environmental impact and extend device lifespan.
Contribution
It introduces a novel FPGA design approach that reuses retired FPGA chips with chiplet integration to enhance sustainability and reduce embodied environmental impacts.
Findings
Potential for significant reduction in manufacturing impacts.
Extended lifespan of FPGA devices through reuse.
Alignment with renewable energy integration trends.
Abstract
There is a growing call for greater amounts of increasingly agile computational power for edge and cloud infrastructure to serve the computationally complex needs of ubiquitous computing devices. Thus, an important challenge is addressing the holistic environmental impacts of these next-generation computing systems. To accomplish this, a life-cycle view of sustainability for computing advancements is necessary to reduce environmental impacts such as greenhouse warming gas emissions from these computing choices. Unfortunately, decadal efforts to address operational energy efficiency in computing devices have ignored and in some cases exacerbated embodied impacts from manufacturing these edge and cloud systems, particularly their integrated circuits. During this time FPGA architectures have not changed dramatically except to increase in size. Given this context, we propose REFRESH FPGAs…
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Taxonomy
TopicsGreen IT and Sustainability · Parallel Computing and Optimization Techniques · Embedded Systems Design Techniques
