Low Complexity High Speed Deep Neural Network Augmented Wireless Channel Estimation
Syed Asrar ul haq, Varun Singh, Bhanu Teja Tanaji, Sumit Darak

TL;DR
This paper introduces a low complexity, high-speed deep neural network-augmented least squares algorithm for wireless channel estimation, achieving better performance and efficiency on Zynq hardware compared to existing methods.
Contribution
It proposes a novel DNN architecture that reduces complexity and increases speed for wireless channel estimation, with optimized implementation on Zynq SoC.
Findings
Outperforms MMSE and state-of-the-art DL-based CE across SNRs and channels
Reduces DNN size by 59% and increases clock frequency by 60%
Uses 50% fewer resources than existing DL-based CE methods
Abstract
The channel estimation (CE) in wireless receivers is one of the most critical and computationally complex signal processing operations. Recently, various works have shown that the deep learning (DL) based CE outperforms conventional minimum mean square error (MMSE) based CE, and it is hardware-friendly. However, DL-based CE has higher complexity and latency than popularly used least square (LS) based CE. In this work, we propose a novel low complexity high-speed Deep Neural Network-Augmented Least Square (LC-LSDNN) algorithm for IEEE 802.11p wireless physical layer and efficiently implement it on Zynq system on chip (ZSoC). The novelty of the LC-LSDNN is to use different DNNs for real and imaginary values of received complex symbols. This helps reduce the size of DL by 59% and optimize the critical path, allowing it to operate at 60% higher clock frequency. We also explore three…
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Taxonomy
TopicsAdvanced Wireless Communication Techniques · Speech and Audio Processing · Full-Duplex Wireless Communications
