Fault-Tolerant Operation of Bosonic Qubits with Discrete-Variable Ancillae

TL;DR

This paper develops a practical fault-tolerance framework for bosonic qubits using discrete-variable ancillae, combining bosonic quantum error correction and advanced control techniques to enable scalable, hardware-efficient quantum computing.

Contribution

It introduces error-corrected gadgets using ancilla-assisted bosonic operations and constructs a universal set of fault-tolerant gadgets for four-legged cat qubits, compatible with current experimental setups.

Findings

Fault-tolerant gadgets tolerate photon loss and ancilla faults.

Schemes are feasible with current circuit-QED hardware.

Proposes a hardware-efficient architecture with high noise threshold.

Abstract

Fault-tolerant quantum computation with bosonic qubits often necessitates the use of noisy discrete-variable ancillae. In this work, we establish a comprehensive and practical fault-tolerance framework for such a hybrid system and synthesize it with fault-tolerant protocols by combining bosonic quantum error correction (QEC) and advanced quantum control techniques. We introduce essential building blocks of error-corrected gadgets by leveraging ancilla-assisted bosonic operations using a generalized variant of path-independent quantum control (GPI). Using these building blocks, we construct a universal set of error-corrected gadgets that tolerate a single photon loss and an arbitrary ancilla fault for four-legged cat qubits. Notably, our construction only requires dispersive coupling between bosonic modes and ancillae, as well as beam-splitter coupling between bosonic modes, both of which have been experimentally demonstrated with strong strengths and high accuracy. Moreover, each error-corrected bosonic qubit is only comprised of a single bosonic mode and a three-level ancilla, featuring the hardware efficiency of bosonic QEC in the full fault-tolerant setting. We numerically demonstrate the feasibility of our schemes using current experimental parameters in the circuit-QED platform. Finally, we present a hardware-efficient architecture for fault-tolerant quantum computing by concatenating the four-legged cat qubits with an outer qubit code utilizing only beam-splitter couplings. Our estimates suggest that the overall noise threshold can be reached using existing hardware. These developed fault-tolerant schemes extend beyond their applicability to four-legged cat qubits and can be adapted for other rotation-symmetrical codes, offering a promising avenue toward scalable and robust quantum computation with bosonic qubits.