LLRF System Considerations for a Compact, Commercial C-band Accelerator using the AMD Xilinx RF-SoC

TL;DR

This paper discusses the design and implementation of an LLRF control system for a compact C-band accelerator using AMD Xilinx RF-SoC, focusing on calibration, disturbance correction, and system status.

Contribution

It introduces a novel LLRF system architecture utilizing RF-SoC for a compact accelerator, highlighting calibration and disturbance correction methods.

Findings

Successful implementation of pulse-to-pulse feedback corrections

Identification of challenges in calibration and disturbance correction

Progress in manufacturing plans for larger-scale deployment

Abstract

This work describes the LLRF and control system in use for a novel accelerator structure developed for a compact design operating in C-band developed by SLAC, with collaboration from RadiaBeam and RadiaSoft. This design is a pulsed RF/pulsed beam system that only provides minimal monitoring for control of each two-cavity pair. Available signals include only a forward and reflected signal for each pair; such a design requires careful consideration of calibration and power-on routines, as well an understanding of how to correct for disturbances caused by the entire RF signal chain, including a new SSA, klystron, and distribution system. An AMD Xilinx RF-SoC with a separate supervisory computer is the LLRF system core, with on-board pulse-to-pulse feedback corrections. This work presents the current status of the project, as well as obstacles and manufacturing plans from the viewpoint of developing for larger-volume manufacturing. This material is based upon work supported by the Defense Advanced Research Projects Agency under Contract Numbers 140D0423C0006 and 140D0423C0007. The views, opinions, and/or findings expressed are those of the author(s) and should not be interpreted as representing the official views or policies of the Department of Defense or the U.S. Government.