TL;DR
Victima is a software-transparent mechanism that significantly enhances address translation reach by repurposing cache resources, reducing page table walk costs and improving performance in data-intensive workloads.
Contribution
Victima introduces a novel cache-based approach to extend translation reach, combining a PTW cost predictor and TLB-aware cache replacement, with minimal overhead.
Findings
Improves application performance by up to 28.7% in native environments.
Reduces page table walk frequency, lowering latency.
Effective in both native and virtualized settings.
Abstract
Address translation is a performance bottleneck in data-intensive workloads due to large datasets and irregular access patterns that lead to frequent high-latency page table walks (PTWs). PTWs can be reduced by using (i) large hardware TLBs or (ii) large software-managed TLBs. Unfortunately, both solutions have significant drawbacks: increased access latency, power and area (for hardware TLBs), and costly memory accesses, the need for large contiguous memory blocks, and complex OS modifications (for software-managed TLBs). We present Victima, a new software-transparent mechanism that drastically increases the translation reach of the processor by leveraging the underutilized resources of the cache hierarchy. The key idea of Victima is to repurpose L2 cache blocks to store clusters of TLB entries, thereby providing an additional low-latency and high-capacity component that backs up the…
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