Implementation of hyperspectral inversion algorithms on FPGA: Hardware comparison using High Level Synthesis

TL;DR

This paper evaluates the performance of hyperspectral inversion algorithms implemented on FPGA using High Level Synthesis, comparing different architectures to identify optimal trade-offs for various applications.

Contribution

It provides a comprehensive benchmarking framework for hyperspectral inversion algorithms on FPGA with HLS, highlighting performance trade-offs and guiding hardware design choices.

Findings

Quantitative performance comparison of multiple algorithms and architectures

Identification of optimal FPGA configurations for specific hyperspectral tasks

Insights into trade-offs between accuracy, speed, and resource utilization

Abstract

Hyperspectral imaging is gathering significant attention due to its potential in various domains such as geology, agriculture, ecology, and surveillance. However, the associated processing algorithms, which are essential for enhancing output quality and extracting relevant information, are often computationally intensive and have to deal with substantial data volumes. Our focus lies on reconfigurable hardware, particularly recent FPGAs. While FPGA design can be complex, High Level Synthesis (HLS) workflows have emerged as a solution, abstracting low-level design intricacies and enhancing productivity. Despite successful prior efforts using HLS for hyperspectral imaging acceleration, we lack a comprehensive research to benchmark various algorithms and architectures within a unified framework. This study aims to quantitatively evaluate performance across different inversion algorithms and design architectures, providing insights for optimal trade-offs for specific applications. We apply this analysis to the case study of spectrum reconstruction processed from interferometric acquisitions taken by Fourier transform spectrometers.