Development of a 100 ps TDC based on a Kintex 7 FPGA for the High Granular Neutron Time-of-Flight detector for the BM@N experiment

TL;DR

This paper presents a 100 ps bin width TDC based on a Kintex 7 FPGA, designed for high-granular neutron detection in the BM@N experiment, achieving a time resolution of around 146 ps.

Contribution

A novel FPGA-based TDC with 100 ps resolution for high-granularity neutron detectors in heavy-ion collision experiments.

Findings

Achieved a 146 ps time resolution on scintillator cells.

Successfully developed a multi-channel TDC readout system.

Validated TDC performance with electron beam tests.

Abstract

The prototype of a TDC board has been developed for the new high granular time-of-flight neutron detector (HGND). The board is based on the standard LVDS 4x asynchronous oversampling using the xc7k160 FPGA with a 100 ps bin width. The HGND is being developed for the BM@N (Baryonic Matter at Nuclotron) experiment to identify neutrons and to measure their energies in heavy-ion collisions at ion beam energies up to 4 A GeV. The HGND consists of about 2000 scintillator detectors (cells) with a size of $40 \times 40 \times 25 mm^3$ and light readout with EQR15 11-6060D-S photodetectors. To measure the time resolution of the scintillator cells, the two-channel FPGA TDC board prototype with two scintillator cells was tested with an electron beam of "Pakhra" synchrotron at the LPI institute (Moscow, Russia). The measured cell time resolution is 146 ps, which is in a good agreement with the 142 ps time resolution measured with a 12-bit @ 5 GS/s CAEN DT5742 digitizer. For the full HGND, the TDC readout board with three such FPGAs will read 250 channels. In total, eight such TDC boards will be used for the full HGND at the BM@N experiment.