GateSeeder: Near-memory CPU-FPGA Acceleration of Short and Long Read Mapping
Julien Eudine, Mohammed Alser, Gagandeep Singh, Can Alkan, Onur, Mutlu

TL;DR
GateSeeder is a novel CPU-FPGA near-memory accelerator that significantly speeds up short and long read mapping in genomics by overcoming memory and compute bottlenecks, outperforming existing tools.
Contribution
It introduces the first near-memory FPGA-based acceleration for both short and long read mapping, with a new lightweight matching segment algorithm.
Findings
Outperforms Minimap2 by up to 40.3x without sequence alignment.
Achieves 1.15-4.33x speedup with sequence alignment over Minimap2.
Demonstrates effectiveness on real sequencing data.
Abstract
Motivation: Read mapping is a computationally expensive process and a major bottleneck in genomics analyses. The performance of read mapping is mainly limited by the performance of three key computational steps: Index Querying, Seed Chaining, and Sequence Alignment. The first step is dominated by how fast and frequent it accesses the main memory (i.e., memory-bound), while the latter two steps are dominated by how fast the CPU can compute their computationally-costly dynamic programming algorithms (i.e., compute-bound). Accelerating these three steps by exploiting new algorithms and new hardware devices is essential to accelerate most genome analysis pipelines that widely use read mapping. Given the large body of work on accelerating Sequence Alignment, this work focuses on significantly improving the remaining steps. Results: We introduce GateSeeder, the first CPU-FPGA-based…
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Taxonomy
TopicsGenomics and Phylogenetic Studies · Algorithms and Data Compression · Chromosomal and Genetic Variations
