An Architecture for Improved Surface Code Connectivity in Neutral Atoms

TL;DR

This paper proposes a novel surface code architecture for neutral atom quantum computers that enhances logical connectivity and reduces overhead through interleaved logical qubits and lattice surgery, with scalability considerations.

Contribution

It introduces an architecture leveraging neutral atom connectivity to improve logical qubit operations and explores hybrid routing strategies for scalable quantum error correction.

Findings

Interleaved logical qubits enable all-to-all connectivity within groups.

Hybrid routing approach optimizes performance for different circuit scales.

Numerical simulations identify the crossover point between atom movement and lattice surgery.

Abstract

In order to achieve error rates necessary for advantageous quantum algorithms, Quantum Error Correction (QEC) will need to be employed, improving logical qubit fidelity beyond what can be achieved physically. As today's devices begin to scale, co-designing architectures for QEC with the underlying hardware will be necessary to reduce the daunting overheads and accelerate the realization of practical quantum computing. In this work, we focus on logical computation in QEC. We address quantum computers made from neutral atom arrays to design a surface code architecture that translates the hardware's higher physical connectivity into a higher logical connectivity. We propose groups of interleaved logical qubits, gaining all-to-all connectivity within the group via efficient transversal CNOT gates. Compared to standard lattice surgery operations, this reduces both the overall qubit footprint and execution time, lowering the spacetime overhead needed for small-scale QEC circuits. We also explore the architecture's scalability. We look at using physical atom movement schemes and propose interleaved lattice surgery which allows an all-to-all connectivity between qubits in adjacent interleaved groups, creating a higher connectivity routing space for large-scale circuits. Using numerical simulations, we evaluate the total routing time of interleaved lattice surgery and atom movement for various circuit sizes. We identify a cross-over point defining intermediate-scale circuits where atom movement is best and large-scale circuits where interleaved lattice surgery is best. We use this to motivate a hybrid approach as devices continue to scale, with the choice of operation depending on the routing distance.