AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling

TL;DR

This paper introduces AxOCS, a novel ML-based supersampling method for designing FPGA-optimized approximate operators, significantly enhancing multi-objective optimization of 8x8 signed multipliers by leveraging correlations across bit-widths.

Contribution

The paper presents AxOCS, a new approach that exploits correlations in PPA and BEHAV metrics across different bit-widths to improve approximate operator design for FPGAs.

Findings

Significant improvement in hypervolume for 8x8 signed multipliers.

Effective use of ML-based supersampling for larger operators.

Enhanced multi-objective optimization results.

Abstract

The rising usage of AI and ML-based processing across application domains has exacerbated the need for low-cost ML implementation, specifically for resource-constrained embedded systems. To this end, approximate computing, an approach that explores the power, performance, area (PPA), and behavioral accuracy (BEHAV) trade-offs, has emerged as a possible solution for implementing embedded machine learning. Due to the predominance of MAC operations in ML, designing platform-specific approximate arithmetic operators forms one of the major research problems in approximate computing. Recently there has been a rising usage of AI/ML-based design space exploration techniques for implementing approximate operators. However, most of these approaches are limited to using ML-based surrogate functions for predicting the PPA and BEHAV impact of a set of related design decisions. While this approach leverages the regression capabilities of ML methods, it does not exploit the more advanced approaches in ML. To this end, we propose AxOCS, a methodology for designing approximate arithmetic operators through ML-based supersampling. Specifically, we present a method to leverage the correlation of PPA and BEHAV metrics across operators of varying bit-widths for generating larger bit-width operators. The proposed approach involves traversing the relatively smaller design space of smaller bit-width operators and employing its associated Design-PPA-BEHAV relationship to generate initial solutions for metaheuristics-based optimization for larger operators. The experimental evaluation of AxOCS for FPGA-optimized approximate operators shows that the proposed approach significantly improves the quality-resulting hypervolume for multi-objective optimization-of 8x8 signed approximate multipliers.