Architecture-Aware Synthesis of Stabilizer Circuits from Clifford Tableaus

TL;DR

This paper presents a hardware-aware method for synthesizing stabilizer circuits from Clifford tableaus, optimizing CNOT gate placement to improve fidelity and reduce execution time on NISQ-era quantum devices.

Contribution

It introduces an architecture-aware synthesis technique that leverages device connectivity to optimize Clifford circuit compilation, outperforming existing methods.

Findings

Reduces CNOT count in synthesized circuits.

Increases fidelity of quantum circuits on real hardware.

Decreases overall execution time of quantum circuits.

Abstract

Since quantum computing is currently in the NISQ-Era, compilation strategies to reduce the number of gates executed on specific hardware are required. In this work, we utilize the concept of synthesis of a data structure called Clifford tableaus, focusing on applying CNOTs within the respective connectivity graph of the quantum device. We hence contribute to the field of compilation or, more precisely, synthesis by reducing the number of CNOTs in the synthesized quantum circuit. Upon convergence, our method shows to outperform other state-of-the-art synthesis techniques, when executed with respect to a specific hardware. Upon executing the resulting circuits on real hardware, our synthesized circuits tend to increase the final fidelity and reduce the overall execution times.