High performance Boson Sampling simulation via data-flow engines

TL;DR

This paper presents a novel FPGA-based data-flow engine implementation that significantly accelerates boson sampling simulations by optimizing permanent evaluation, achieving 40-photon simulations at approximately 80 seconds per sample.

Contribution

The authors generalize the permanent formula to include row multiplicities and implement it on FPGA data-flow engines, enabling faster boson sampling simulations.

Findings

Achieved 40-photon boson sampling simulation in ~80 seconds per sample.

Validated performance aligns with theoretical estimates by Clifford & Clifford.

The design supports both ideal and lossy boson sampling scenarios.

Abstract

In this work, we generalize the Balasubramanian-Bax-Franklin-Glynn (BB/FG) permanent formula to account for row multiplicities during the permanent evaluation and reduce the complexity of permanent evaluation in scenarios where such multiplicities occur. This is achieved by incorporating n-ary Gray code ordering of the addends during the evaluation. We implemented the designed algorithm on FPGA-based data-flow engines and utilized the developed accessory to speed up boson sampling simulations up to $40$ photons, by drawing samples from a $60$ mode interferometer at an averaged rate of $\sim80$ seconds per sample utilizing $4$ FPGA chips. We also show that the performance of our BS simulator is in line with the theoretical estimation of Clifford \& Clifford \cite{clifford2020faster} providing a way to define a single parameter to characterize the performance of the BS simulator in a portable way. The developed design can be used to simulate both ideal and lossy boson sampling experiments.