Using Evolutionary Algorithms to Find Cache-Friendly Generalized Morton Layouts for Arrays

TL;DR

This paper introduces an evolutionary algorithm-based approach to optimize multi-dimensional array layouts for better cache performance, leading to significant real-world speedups.

Contribution

It presents a novel genetic algorithm framework for exploring and optimizing generalized Morton layouts for arrays, improving cache efficiency and application performance.

Findings

Optimized layouts achieve up to 10x speedup in real hardware.

Fitness correlates well with kernel execution time.

Method finds effective layouts in few generations.

Abstract

The layout of multi-dimensional data can have a significant impact on the efficacy of hardware caches and, by extension, the performance of applications. Common multi-dimensional layouts include the canonical row-major and column-major layouts as well as the Morton curve layout. In this paper, we describe how the Morton layout can be generalized to a very large family of multi-dimensional data layouts with widely varying performance characteristics. We posit that this design space can be efficiently explored using a combinatorial evolutionary methodology based on genetic algorithms. To this end, we propose a chromosomal representation for such layouts as well as a methodology for estimating the fitness of array layouts using cache simulation. We show that our fitness function correlates to kernel running time in real hardware, and that our evolutionary strategy allows us to find candidates with favorable simulated cache properties in four out of the eight real-world applications under consideration in a small number of generations. Finally, we demonstrate that the array layouts found using our evolutionary method perform well not only in simulated environments but that they can effect significant performance gains -- up to a factor ten in extreme cases -- in real hardware.