An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators

TL;DR

This paper introduces an open-source, ML-based full-stack optimization framework that accurately predicts hardware and system performance metrics for ML accelerators, enabling automated design space exploration.

Contribution

It presents a unified, learning-based prediction framework combining backend PPA analysis with frontend simulation, and includes an automated DSE technique for ML accelerator design.

Findings

Predicts backend PPA and system metrics with less than 7% error

Works across different processes and accelerator platforms

Enables automated optimization of hardware and system parameters

Abstract

Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML. To fully enable their design space exploration (DSE), we propose a physical-design-driven, learning-based prediction framework for hardware-accelerated deep neural network (DNN) and non-DNN ML algorithms. It adopts a unified approach that combines backend power, performance, and area (PPA) analysis with frontend performance simulation, thereby achieving a realistic estimation of both backend PPA and system metrics such as runtime and energy. In addition, our framework includes a fully automated DSE technique, which optimizes backend and system metrics through an automated search of architectural and backend parameters. Experimental studies show that our approach consistently predicts backend PPA and system metrics with an average 7% or less prediction error for the ASIC implementation of two deep learning accelerator platforms, VTA and VeriGOOD-ML, in both a commercial 12 nm process and a research-oriented 45 nm process.