iEDA: An Open-Source Intelligent Physical Implementation Toolkit and Library

TL;DR

iEDA is an open-source EDA toolkit that provides a comprehensive infrastructure for physical design and analysis, demonstrated by successful chip tapeouts across various scales and process nodes.

Contribution

This work introduces a complete open-source physical design toolkit, bridging the industrial-academic gap and enabling chip design innovation.

Findings

Successfully tapeouted three chips of different scales using iEDA

iEDA covers the entire physical design flow and analysis tools

Demonstrates effectiveness across multiple process nodes

Abstract

Open-source EDA shows promising potential in unleashing EDA innovation and lowering the cost of chip design. This paper presents an open-source EDA project, iEDA, aiming for building a basic infrastructure for EDA technology evolution and closing the industrial-academic gap in the EDA area. iEDA now covers the whole flow of physical design (including Floorplan, Placement, CTS, Routing, Timing Optimization etc.), and part of the analysis tools (Static Timing Analysis and Power Analysis). To demonstrate the effectiveness of iEDA, we implement and tape out three chips of different scales (from 700k to 1.5M gates) on different process nodes (110nm and 28nm) with iEDA. iEDA is publicly available from the project home page http://ieda.oscc.cc.