Through-chip microchannels for three-dimensional integrated circuits cooling

TL;DR

This paper introduces through-chip microchannels (TCMCs) for efficient cooling of multilayer 3D integrated circuits, demonstrating optimized parameters via CFD simulations to support high power densities with manageable temperature rises.

Contribution

The study designs and analyzes TCMCs crossing entire chips, providing a novel cooling approach with optimized microchannel parameters for multilayer 3D ICs.

Findings

Optimal microchannel pitch of 10 μm and radius of 1 μm for cooling performance.

Supports power densities over 10^4 W/cm² with temperature rise below 60 K.

Cooling effectiveness remains consistent across different numbers of layers.

Abstract

Cooling high-power electronics in multilayer integrated circuits (ICs) is challenging for existing cooling methods. In this work, we designed through-chip microchannels (TCMCs) that cross the entire chip perpendicularly to the layers, with water circulating inside to provide direct cooling to each layer. TCMCs are organized in a square array where the pitch and radius of the microchannels are explored. Our computational fluid dynamics (CFD) simulations show that a pitch 10 {\mu}m and a radius 1 {\mu}m optimize the cooling performance to support a power higher than 10^4 W/cm2 while the maximum temperature rise remains below 60 K with a water inlet temperature of 300 K. We show that the cooling properties do not change with the number of layers for a given chip thickness which provides flexibility to the functional design of the chip. Though manufacturing may be challenging, TCMCs offer a new way for chip cooling that could provide a leap forward in the performance of multilayer 3D ICs and high-power electronics.