Determining the Optimal Frequencies for a Duplicated Randomized Clock SCA Countermeasure
Gabriel Klasson Landin, Truls Jilborg

TL;DR
This paper investigates the optimal frequency settings for a duplicated randomized clock countermeasure to improve side-channel attack resistance in embedded systems, using FPGA simulations and attack analysis.
Contribution
It identifies specific frequency configurations that maximize security against side-channel attacks when combined with dummy cores and clock randomization.
Findings
Lower than half of the base frequency improves security
Frequencies close to but not exceeding the base frequency are optimal
Optimal frequency sets reduce the number of power traces needed for attack
Abstract
Side-channel attacks pose significant challenges to the security of embedded systems, often allowing attackers to circumvent encryption algorithms in minutes compared to the trillions of years required for brute-force attacks. To mitigate these vulnerabilities, various countermeasures have been developed. This study focuses on two specific countermeasures: randomization of the encryption algorithm's clock and the incorporation of a dummy core to disguise power traces. The objective of this research is to identify the optimal frequencies that yield the highest level of randomness when these two countermeasures are combined. By investigating the interplay between clock randomization and the presence of dummy cores, we aim to enhance the overall security of embedded systems. The insights gained from this study will contribute to the development of more robust countermeasures against…
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Taxonomy
TopicsCryptographic Implementations and Security · Physical Unclonable Functions (PUFs) and Hardware Security · Security and Verification in Computing
