Improved Parameter Targeting in 3D-Integrated Superconducting Circuits through a Polymer Spacer Process

TL;DR

This paper introduces a polymer spacer process to precisely control inter-chip separation in 3D superconducting circuits, significantly improving frequency targeting accuracy and maintaining high device quality.

Contribution

The authors develop and demonstrate a polymer spacer method that reduces planarity errors and frequency deviations in multi-chip superconducting quantum devices.

Findings

Reduced planarity error by a factor of 3.5

Achieved chip-to-chip separation deviation of 0.4 μm

Maintained high internal quality factors of 5×10^5

Abstract

Three-dimensional device integration facilitates the construction of superconducting quantum information processors with more than several tens of qubits by distributing elements such as control wires, qubits, and resonators between multiple layers. The frequencies of resonators and qubits in flip-chip-bonded multi-chip modules depend on the details of their electromagnetic environment defined by the conductors and dielectrics in their vicinity. Accurate frequency targeting therefore requires precise control of the separation between chips and minimization of their relative tilt. Here, we describe a method to control the inter-chip separation by using polymer spacers. Compared to an identical process without spacers, we reduce the measured planarity error by a factor of 3.5, to a mean tilt of 76(35) $\mu$rad, and the deviation from the target inter-chip separation by a factor of ten, to a mean of 0.4(8) $\mu$m. We apply this process to coplanar waveguide resonator samples and observe chip-to-chip resonator frequency variations below 50 MHz ($\approx$ 1 %). We measure internal quality factors of $5 \times 10^5$ at the single-photon level, suggesting that the added spacers are compatible with low-loss device fabrication.