An Integrated FPGA Accelerator for Deep Learning-based 2D/3D Path Planning
Keisuke Sugiura, Hiroki Matsutani

TL;DR
This paper introduces P3Net, a lightweight deep learning-based path planning method optimized for FPGA acceleration, significantly improving speed and power efficiency for 2D/3D robotic path planning.
Contribution
The paper presents P3Net and its FPGA-based IP core, achieving real-time performance and better success rates compared to existing methods, with substantial speed and power efficiency improvements.
Findings
P3Net runs up to 149.57x faster than ARM Cortex CPU.
P3Net achieves up to 1049.42x power efficiency over workstations.
P3Net improves success rate by up to 28.2%.
Abstract
Path planning is a crucial component for realizing the autonomy of mobile robots. However, due to limited computational resources on mobile robots, it remains challenging to deploy state-of-the-art methods and achieve real-time performance. To address this, we propose P3Net (PointNet-based Path Planning Networks), a lightweight deep-learning-based method for 2D/3D path planning, and design an IP core (P3NetCore) targeting FPGA SoCs (Xilinx ZCU104). P3Net improves the algorithm and model architecture of the recently-proposed MPNet. P3Net employs an encoder with a PointNet backbone and a lightweight planning network in order to extract robust point cloud features and sample path points from a promising region. P3NetCore is comprised of the fully-pipelined point cloud encoder, batched bidirectional path planner, and parallel collision checker, to cover most part of the algorithm. On the 2D…
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Taxonomy
TopicsRobotic Path Planning Algorithms · Autonomous Vehicle Technology and Safety · Robotics and Sensor-Based Localization
