OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin

TL;DR
OpenPARF is an open-source FPGA placement and routing framework leveraging deep learning and GPU parallelization, achieving improved wirelength and faster placement for large-scale designs.
Contribution
It introduces a novel asymmetric electrostatic field system and supports large-scale irregular routing, advancing FPGA physical design automation.
Findings
Achieves 0.4-12.7% reduction in routed wirelength.
More than 2x speedup in placement time.
Supports large-scale irregular routing resource graphs.
Abstract
This paper proposes OpenPARF, an open-source placement and routing framework for large-scale FPGA designs. OpenPARF is implemented with the deep learning toolkit PyTorch and supports massive parallelization on GPU. The framework proposes a novel asymmetric multi-electrostatic field system to solve FPGA placement. It considers fine-grained routing resources inside configurable logic blocks (CLBs) for FPGA routing and supports large-scale irregular routing resource graphs. Experimental results on ISPD 2016 and ISPD 2017 FPGA contest benchmarks and industrial benchmarks demonstrate that OpenPARF can achieve 0.4-12.7% improvement in routed wirelength and more than speedup in placement. We believe that OpenPARF can pave the road for developing FPGA physical design engines and stimulate further research on related topics.
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Taxonomy
TopicsVLSI and FPGA Design Techniques · VLSI and Analog Circuit Testing · 3D IC and TSV technologies
