A nanogapped hysteresis-free field-effect transistor
Jiachen Tang, Luhao Liu, Yinjiang Shao, Xinran Wang, Yi Shi and, Songlin Li
TL;DR
This paper introduces a novel nanogapped, hysteresis-free FET device structure using van der Waals stacking, promising improved reliability and potential applications in sensors.
Contribution
The work presents a semi-suspended nanogapped FET design with ultraclean interfaces, eliminating hysteresis and enabling reliable nanoelectronic and sensing applications.
Findings
High device quality with negligible hysteresis
Ultraclean channel interfaces and Ohmic contacts
Potential for nanofluid and pressure sensors
Abstract
We propose a semi-suspended device structure and construct nanogapped, hysteresis-free field-effect transistors (FETs), based on the van der Waals stacking technique. The structure, which features a semi-suspended channel above a submicron-long wedge-like nanogap, is fulfilled by transferring ultraclean BN-supported MoS channels directly onto dielectric-spaced vertical source/drain stacks. Electronic characterization and analyses reveal a high overall device quality, including ultraclean channel interfaces, negligible electrical scanning hysteresis, and Ohmic contacts in the structures. The unique hollow FET structure holds the potential for exploiting reliable electronics, as well as nanofluid and pressure sensors.
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