Retrospective: A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing
Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi

TL;DR
This paper reviews the design and impact of Tesseract, a programmable near-memory processing system for graph workloads, highlighting its innovative architecture and influence on subsequent research.
Contribution
It introduced a fully programmable, customizable near-memory accelerator system, Tesseract, for graph processing, combining 3D-stacked memory with general-purpose cores and a message-passing model.
Findings
First to design a general-purpose near-memory accelerator system
Influenced subsequent academic and industry work on PIM architectures
Demonstrated significant acceleration for graph workloads
Abstract
Our ISCA 2015 paper provides a new programmable processing-in-memory (PIM) architecture and system design that can accelerate key data-intensive applications, with a focus on graph processing workloads. Our major idea was to completely rethink the system, including the programming model, data partitioning mechanisms, system support, instruction set architecture, along with near-memory execution units and their communication architecture, such that an important workload can be accelerated at a maximum level using a distributed system of well-connected near-memory accelerators. We built our accelerator system, Tesseract, using 3D-stacked memories with logic layers, where each logic layer contains general-purpose processing cores and cores communicate with each other using a message-passing programming model. Cores could be specialized for graph processing (or any other application to be…
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Taxonomy
TopicsGraph Theory and Algorithms · Cloud Computing and Resource Management · Advanced Memory and Neural Computing
