Citadel: Simple Spectre-Safe Isolation For Real-World Programs That Share Memory

TL;DR

Citadel introduces a practical microarchitectural isolation technique that mitigates Spectre-like attacks by restricting speculative execution, enabling secure sharing of memory with minimal performance overhead.

Contribution

The paper presents a novel approach called relaxed microarchitectural isolation (RMI) that enforces speculative security, implemented through hardware mechanisms and two defense modes, Safe and Burst.

Findings

Less than 5% performance overhead in prototype

Effective mitigation of Spectre-like attacks

Supports secure cryptographic and inference applications

Abstract

Transient execution side-channel attacks, such as Spectre, have been shown to break almost all isolation primitives. We introduce a new security property we call relaxed microarchitectural isolation (RMI) that allows sensitive programs that are not-constant-time to share memory with an attacker while restricting the information leakage to that of non-speculative execution. Although this type of speculative security property is typically challenging to enforce, we show that we can leverage the enclave setup to achieve it. In particular, we use microarchitectural isolation to restrict attacker's observations in conjunction with straightforward hardware mechanisms to limit speculation. This new design point presents a compelling trade-off between security, usability, and performance, making it possible to efficiently enforce RMI for any program. We demonstrate our approach by implementing and evaluating two simple defense mechanisms that satisfy RMI: (1) Safe mode, which disables speculative accesses to shared memory, and (2) Burst mode, a localized performance optimization that requires simple program analysis on small code snippets. Our end-to-end prototype, Citadel, consists of an FPGA-based multicore processor that boots Linux and runs secure applications, including cryptographic libraries and private inference, with less than 5% performance overhead.