CIMulator: A Comprehensive Simulation Platform for Computing-In-Memory Circuit Macros with Low Bit-Width and Real Memory Materials

TL;DR

CIMulator is a versatile simulation platform that evaluates the performance of various synaptic devices in neuromorphic accelerators across multiple neural network architectures and datasets, demonstrating high accuracy with low-bit-width weights.

Contribution

The paper introduces CIMulator, a comprehensive simulation tool for assessing different memory-based synaptic devices in neuromorphic systems, including novel integration of spiking neural networks with RRAM devices.

Findings

Low-bit-width and binary weights can achieve near-software CNN accuracy.

Spiking neural networks with RRAM devices effectively recognize handwritten digits.

Simulation results guide the design of energy-efficient neuromorphic hardware.

Abstract

This paper presents a simulation platform, namely CIMulator, for quantifying the efficacy of various synaptic devices in neuromorphic accelerators for different neural network architectures. Nonvolatile memory devices, such as resistive random-access memory, ferroelectric field-effect transistor, and volatile static random-access memory devices, can be selected as synaptic devices. A multilayer perceptron and convolutional neural networks (CNNs), such as LeNet-5, VGG-16, and a custom CNN named C4W-1, are simulated to evaluate the effects of these synaptic devices on the training and inference outcomes. The dataset used in the simulations are MNIST, CIFAR-10, and a white blood cell dataset. By applying batch normalization and appropriate optimizers in the training phase, neuromorphic systems with very low-bit-width or binary weights could achieve high pattern recognition rates that approach software-based CNN accuracy. We also introduce spiking neural networks with RRAM-based synaptic devices for the recognition of MNIST handwritten digits.