Mechanical transistors for logic-with-memory computing

TL;DR

This paper introduces a mechanical transistor that enables logic-with-memory computing using thermal and nonlinear soft actuators, paving the way for non-electronic, reprogrammable mechanical computing systems.

Contribution

It presents the design of a mechanical transistor capable of forming complex logic and memory circuits, advancing the development of universal mechanical computing architectures.

Findings

Successfully demonstrated mechanical logic gates and memory units

Fewer units needed compared to electronic counterparts

Established a reprogrammable mechanical processing core

Abstract

As a potential revolutionary topic in future information processing, mechanical computing has gained tremendous attention for replacing or supplementing conventional electronics vulnerable to power outages, security attacks, and harsh environments. Despite its potential for constructing intelligent matter towards nonclassical computing systems beyond the von Neumann architecture, most works on mechanical computing demonstrated that the ad hoc design of simple logic gates cannot fully realize a universal mechanical processing framework involving interconnected arithmetic logic components and memory. However, such a logic-with-memory computing architecture is critical for complex and persistent state-dependent computations such as sequential logic. Here we propose a mechanical transistor (M-Transistor), abstracting omnipresent temperatures as the input-output mechanical bits, which consists of a metamaterial thermal channel as the gate terminal driving a nonlinear bistable soft actuator to selectively connect the output terminal to two other variable thermal sources. This M-Transistor is an elementary unit to modularly form various combinational and sequential circuits, such as complex logic gates, registers (volatile memory), and long-term memories (non-volatile memory) with much fewer units than the electronic counterparts. Moreover, they can establish a universal processing core comprising an arithmetic circuit and a register in a compact, reprogrammable network involving periodic read, write, memory, and logic operations of the mechanical bits. Our work contributes to realizing a non-electric universal mechanical computing architecture that combines multidisciplinary engineering with structural mechanics, materials science, thermal engineering, physical intelligence, and computational science.