Hierarchical Neural Memory Network for Low Latency Event Processing
Ryuhei Hamaguchi, Yasutaka Furukawa, Masaki Onishi, Ken Sakurada

TL;DR
This paper introduces a hierarchical neural memory network that adaptively encodes scene contents at different temporal scales, significantly reducing latency and improving accuracy in event-based dense prediction tasks.
Contribution
It presents a novel multi-level memory architecture with attention-based event encoding for low latency, dynamic scene understanding.
Findings
Outperforms existing methods in accuracy and latency
Effectively encodes sparse event streams into memory
Demonstrates superior event and image fusion capabilities
Abstract
This paper proposes a low latency neural network architecture for event-based dense prediction tasks. Conventional architectures encode entire scene contents at a fixed rate regardless of their temporal characteristics. Instead, the proposed network encodes contents at a proper temporal scale depending on its movement speed. We achieve this by constructing temporal hierarchy using stacked latent memories that operate at different rates. Given low latency event steams, the multi-level memories gradually extract dynamic to static scene contents by propagating information from the fast to the slow memory modules. The architecture not only reduces the redundancy of conventional architectures but also exploits long-term dependencies. Furthermore, an attention-based event representation efficiently encodes sparse event streams into the memory cells. We conduct extensive evaluations on three…
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Taxonomy
TopicsAdvanced Neural Network Applications · Brain Tumor Detection and Classification · Image Enhancement Techniques
