A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses

TL;DR

This paper presents a co-designed 28nm FD-SOI analog SNN crossbar circuit with tunable features, enabling integration with various emerging non-volatile memory technologies for low-power neural network inference.

Contribution

It introduces a versatile, tunable output circuit design for analog SNNs compatible with multiple eNVM types, supported by simulation and experimental data.

Findings

Circuit simulation results demonstrate effective neuron fan-in limits.

Experimental eNVM data validate the circuit's compatibility with different memory technologies.

Design trade-offs influence the maximum achievable fan-in and power efficiency.

Abstract

In this work we report a study and a co-design methodology of an analog SNN crossbar output circuit designed in a 28nm FD-SOI technology node that comprises a tunable current attenuator and a leak-integrate and fire neurons that would enable the integration of emerging non-volatile memories (eNVMs) for synaptic arrays based on various technologies including phase change (PCRAM), oxide-based (OxRAM), spin transfer and spin orbit torque magnetic memories (STT, SOT-MRAM). Circuit SPICE simulation results and eNVM experimental data are used to showcase and estimate the neurons fan-in for each type of eNVM considering the technology constraints and design trade-offs that set its limits such as membrane capacitance and supply voltage, etc.