Logical Magic State Preparation with Fidelity Beyond the Distillation Threshold on a Superconducting Quantum Processor

TL;DR

This paper demonstrates a hardware-efficient protocol for preparing high-fidelity logical magic states on a superconducting quantum processor, surpassing the fidelity thresholds required for fault-tolerant quantum computing.

Contribution

The authors present a scalable, hardware-efficient method for arbitrary logical state preparation on the rotated surface code, experimentally achieving fidelities above the distillation threshold.

Findings

Achieved an average logical fidelity of 0.8983 for different states.

Prepared specific magic states with fidelities exceeding distillation thresholds.

Demonstrated non-destructive preparation of high-fidelity logical magic states.

Abstract

Fault-tolerant quantum computing based on surface code has emerged as an attractive candidate for practical large-scale quantum computers to achieve robust noise resistance. To achieve universality, magic states preparation is a commonly approach for introducing non-Clifford gates. Here, we present a hardware-efficient and scalable protocol for arbitrary logical state preparation for the rotated surface code, and further experimentally implement it on the \textit{Zuchongzhi} 2.1 superconducting quantum processor. An average of \hhl{$0.8983 \pm 0.0002$} logical fidelity at different logical states with distance-three is achieved, \hhl{taking into account both state preparation and measurement errors.} In particular, \hhl{the magic states $|A^{\pi/4}\rangle_L$, $|H\rangle_L$, and $|T\rangle_L$ are prepared non-destructively with logical fidelities of $0.8771 \pm 0.0009 $, $0.9090 \pm 0.0009 $, and $0.8890 \pm 0.0010$, respectively, which are higher than the state distillation protocol threshold, 0.859 (for H-type magic state) and 0.827 (for T -type magic state).} Our work provides a viable and efficient avenue for generating high-fidelity raw logical magic states, which is essential for realizing non-Clifford logical gates in the surface code.