AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing
Hadjer Benmeziane, Corey Lammie, Irem Boybat, Malte Rasch, Manuel Le, Gallo, Hsinyu Tsai, Ramachandran Muralidhar, Smail Niar, Ouarnoughi Hamza,, Vijay Narayanan, Abu Sebastian, Kaoutar El Maghraoui

TL;DR
AnalogNAS is an automated neural network design framework optimized for analog in-memory computing hardware, achieving higher accuracy and efficiency for edge inference tasks compared to state-of-the-art models.
Contribution
It introduces a novel framework for designing DNNs specifically tailored for analog IMC hardware, enhancing accuracy and deployment efficiency.
Findings
AnalogNAS models outperform SOTA models on TinyML tasks.
Models achieve higher accuracy on a 64-core PCM-based IMC chip.
Extensive hardware simulations validate the framework's effectiveness.
Abstract
The advancement of Deep Learning (DL) is driven by efficient Deep Neural Network (DNN) design and new hardware accelerators. Current DNN design is primarily tailored for general-purpose use and deployment on commercially viable platforms. Inference at the edge requires low latency, compact and power-efficient models, and must be cost-effective. Digital processors based on typical von Neumann architectures are not conducive to edge AI given the large amounts of required data movement in and out of memory. Conversely, analog/mixed signal in-memory computing hardware accelerators can easily transcend the memory wall of von Neuman architectures when accelerating inference workloads. They offer increased area and power efficiency, which are paramount in edge resource-constrained environments. In this paper, we propose AnalogNAS, a framework for automated DNN design targeting deployment on…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices · Neural Networks and Reservoir Computing
