Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors

TL;DR

This study compares the uniformity of Dolan-bridge and bridgeless Manhattan Josephson junctions across wafers, revealing that Manhattan junctions perform better on TSV substrates and exhibit predictable spatial conductance variations.

Contribution

It provides a detailed analysis of wafer-scale uniformity for different Josephson junction types, introducing a geometric model to explain spatial conductance variations.

Findings

Dolan junctions have higher yield and lower conductance spread on planar substrates.

Manhattan junctions outperform Dolan junctions on TSV substrates in uniformity.

Conductance decreases from wafer center to edge, explained by a shadowing model.

Abstract

We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs). Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to ~100 MHz in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer centre to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.