Development of 15kA/cm$^2$ Fabrication Process for Superconducting Integrated Digital Circuits
Liliang Ying, Xue Zhang, Guixiang He, Weifeng Shi, Hui Xie, Linxian, Ma, Hui Zhang, Jie Ren, Wei Peng, and Zhen Wang

TL;DR
This paper presents a new superconducting fabrication process, 'SIMIT Nb04', enabling high critical current density Josephson junctions and improved process control for integrated digital circuits.
Contribution
The paper introduces the 'SIMIT Nb04' process with seven Nb layers, CMP technology, and enhanced process control, advancing superconducting circuit fabrication capabilities.
Findings
Successful fabrication of small-scale circuits demonstrating process viability.
Achievement of 15 kA/cm² critical current density in Josephson junctions.
Enhanced process control and repeatability confirmed through PCMs.
Abstract
A new fabrication process for superconducting integrated digital circuits is reported. We have developed the "SIMIT Nb04" fabrication technique for superconducting integrated circuits with Nb-based Josephson junctions based on the validated "SIMIT Nb03" process and Chemical Mechanical Planarization (CMP) technology. Seven Nb superconducting layers and one Mo resistor layer are included in the "SIMIT Nb04" process with 19 mask levels. The device structure is composed of active layers including junctions at the bottom, two passive transmission line (PTL) layers in the middle and a DC power layer at the top. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistance Rsh of 3 , followed by the deposition of Nb/Al-AlO/Nb trilayer Josephson-junction with a target critical current density Jc at 15 kA/cm. To increase the Al-AlO…
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Taxonomy
TopicsSilicon Carbide Semiconductor Technologies · Physics of Superconductivity and Magnetism · Superconducting Materials and Applications
