Partially Fault-tolerant Quantum Computing Architecture with Error-corrected Clifford Gates and Space-time Efficient Analog Rotations
Yutaro Akahoshi, Kazunori Maruyama, Hirotaka Oshima, Shintaro Sato,, Keisuke Fujii

TL;DR
This paper proposes a partially fault-tolerant quantum computing architecture that combines error-corrected Clifford gates with space-time efficient analog rotations, aiming to bridge the gap between NISQ devices and full FTQC.
Contribution
It introduces a novel architecture that omits typical distillation protocols, enabling direct analog rotations and reducing qubit requirements for early-FTQC devices.
Findings
Can perform over 17 million Clifford operations on 64 logical qubits
Achieves approximately 37,500 arbitrary rotations on the same logical qubits
Outperforms existing NISQ and FTQC architectures on similar hardware
Abstract
Quantum computers are expected to bring drastic acceleration to several computing tasks against classical computers. Noisy intermediate-scale quantum (NISQ) devices, which have tens to hundreds of noisy physical qubits, are gradually becoming available, but it is still challenging to achieve useful quantum advantages in meaningful tasks at this moment. On the other hand, the full fault-tolerant quantum computing (FTQC) based on the quantum error correction (QEC) code remains far beyond realization due to its extremely large requirement of high-precision physical qubits. In this study, we propose a quantum computing architecture to close the gap between NISQ and FTQC. Our architecture is based on erroneous arbitrary rotation gates and error-corrected Clifford gates implemented by lattice surgery. We omit the typical distillation protocol to achieve direct analog rotations and small qubit…
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Parallel Computing and Optimization Techniques · Quantum Information and Cryptography
