Logical Characterization of Algebraic Circuit Classes over Integral Domains
Timon Barlag, Florian Chudigiewitsch, Sabrina Alexandra Gaube

TL;DR
This paper extends algebraic circuit classes over the reals to arbitrary infinite integral domains, providing logical characterizations and hierarchy results that unify and generalize classical complexity classes over various domains.
Contribution
It introduces a generalized framework for algebraic circuits over integral domains and establishes logical characterizations and hierarchy theorems for these classes.
Findings
Sets decided by constant-depth, polynomial-size circuits match definable first-order logic.
Characterizations of $ ext{AC}_R$ and $ ext{NC}_R$ hierarchies are provided.
Framework applies to Boolean $ ext{AC}$ and $ ext{NC}$ hierarchies as well.
Abstract
We present an adapted construction of algebraic circuits over the reals introduced by Cucker and Meer to arbitrary infinite integral domains and generalize the and -classes for this setting. We give a theorem in the style of Immerman's theorem which shows that for these adapted formalisms, sets decided by circuits of constant depth and polynomial size are the same as sets definable by a suitable adaptation of first-order logic. Additionally, we discuss a generalization of the guarded predicative logic by Durand, Haak and Vollmer and we show characterizations for the and hierarchy. Those generalizations apply to the Boolean and hierarchies as well. Furthermore, we introduce a formalism to be able to compare some of the aforementioned complexity classes with different…
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Taxonomy
TopicsAdvanced Algebra and Logic · Logic, Reasoning, and Knowledge · Logic, programming, and type systems
Logical Characterizations of algebraic Circuit Classes over Integral domains
Timon Barlag
Institut für Theoretische Informatik, Leibniz Universität Hannover, 30167 Hannover, Germany
,
Florian Chudigiewitsch
Institut für Theoretische Informatik, Universität zu Lübeck, 23562 Lübeck, Germany
and
Sabrina A. Gaube
Abstract.
We present an adapted construction of algebraic circuits over the reals introduced by Cucker and Meer to arbitrary infinite integral domains and generalize the and -classes for this setting. We give a theorem in the style of Immerman’s theorem which shows that for these adapted formalisms, sets decided by circuits of constant depth and polynomial size are the same as sets definable by a suitable adaptation of first-order logic. Additionally, we discuss a generalization of the guarded predicative logic by Durand, Haak and Vollmer and we show characterizations for the and hierarchy. Those generalizations apply to the Boolean and hierarchies as well. Furthermore, we introduce a formalism to be able to compare some of the aforementioned complexity classes with different underlying integral domains.
Key words and phrases:
Algebraic circuits, descriptive complexity
1. Introduction
Boolean circuits as a computational model are a fundamental concept in the study of theoretical computer science. Mainly in computational complexity, Boolean circuits play a central part in the analysis of parallel algorithms and the corresponding complexity classes, enabling a finer view and providing new proof methods, especially for subpolynomial complexity classes. An obvious generalization of Boolean circuits is that instead of dealing with truth values as inputs – or the field for the algebraically minded – we consider elements from some other algebraic structure. This approach has its roots in the works of Blum, Shub, and Smale, whose model of the BSS-machine is able to describe computations over real numbers. Following this, Blum, Shub, Smale, and Cucker [Blu+98] also give a generalization to algebraic circuits over the reals.
1.1. Our Contribution
In this article, we provide logical characterizations of circuit complexity classes over integral domains. In particular, we define natural extensions of the classical circuit complexity hierarchies and over arbitrary integral domains. The resulting classes are denoted as and , respectively. We adapt the framework of metafinite model theory to define various extensions of first order logic, which capture these new complexity classes.
We establish a Immerman-style theorem stating that and provide a framework to establish complexity-theoretic comparisons of classes with different underlying integral domains and give examples over which integral domain the -classes are equal.
We adapt the -operator, which Durand, Haak and Vollmer use to provide logical characterizations of and [DHV18] to logics over metafinite structures and extend it to be able to characterize the whole and -hierarchies.
Finally, we define a formalism suitable for comparing complexity classes with different underlying integral domains and we show that a hierarchy of sets of complexity classes emerges, such that each set is able to “simulate” the complexity classes from the sets lower in the hierarchy.
1.2. Related Work
Another model of computation that is commonly known under the name “algebraic circuit” are Valiant circuits [Val79], which are the foundational model in the emerging subfields of algebraic and geometric complexity theory. They differ from the model we analyze in this work in the way that we use -gates, which are not available in the Valiant setting. This difference is of complexity-theoretical significance since for our model, we have that [Cuc92] but we have that [Bür13] in the Valiant setting for every field, in particular over the reals.
1.3. Outline of the Paper
We start with an overview of some central concepts from algebra and circuit complexity, which are needed for the definition of our model. We then establish our model of algebraic circuits for arbitrary integral domains and the analogous complexity classes induced by them in analogy to the Boolean case. Afterwards, we give a logical characterization of the presented circuit classes inspired by classical descriptive complexity. However, since our models now have an infinite component, we build on the foundations of metafinite model theory.
We then go on to define first-order logic over and show that, like in the classical case, we have that .
In Section 4, we give logical characterizations of and . The tool of our choice is an adaptation of the guarded predicative logic of [DHV18].
In Section 5, we discuss connections between -classes over different integral domains.
Acknowledgements**.**
We thank Sebastian Berndt and Anselm Haak for fruitful discussions.
2. Preliminaries
First, we discuss the theoretical background of this paper. We give the basic definitions and remarks on the notation used in this paper.
Notation 2.1**.**
In this paper, we will generally use overlined letters (e. g. ) to denote tuples.
As the name suggests, algebraic circuit classes make use of concepts originating from abstract algebra. We will first give an overview of some fundamental concepts used in this paper. For further information on the topic, the reader may refer to the books by Aluffi [Alu09] or Lang [Lan02].
Definition 2.2** (Ring).**
A ring with unit is a tuple consisting of a set and two binary operations and such that
- •
- •
is an abelian group, i. e.
- –
For every , we have
- –
For every , we have
- –
There is a , we have
- –
For every , there exists an inverse
- •
is a monoid, i. e.
- –
- –
There is a such that
- •
multiplication is distributive with respect to addition:
[TABLE]
A ring is called commutative, if , for all .
In the following a ring is always assumed to have a unit.
Definition 2.3** (Integral domain).**
A ring with unit is called integral domain, if it is a commutative ring and if there is no element which is a zero-divisor, i. e. there is no for which there is a with .
Throughout the paper, whenever not otherwise specified, we use to denote an infinite integral domain.
Remark 2.4**.**
In particular we require that for every the equations
[TABLE]
hold.
Definition 2.5** (Polynomial).**
Let be a ring. A polynomial in the indeterminate and with coefficients in is a finite linear combination of nonnegative exponents of with coefficients in :
[TABLE]
where all are elements of (the coefficients) and we require for infinitely many . Two polynomials are taken to be equal if all the coefficients are equal:
[TABLE]
The set of polynomials in over is denoted by .
Definition 2.6** (Polynomial ring).**
Let and be two polynomials. A polynomial ring is the set together with the following two operations:
[TABLE]
and
[TABLE]
The unit of this ring is .
Remark 2.7**.**
A polynomial ring like in Definition 2.6 is also a ring with unit. Analogous to Definition 2.6, we can a define polyomial ring with finitely many variables by applying Definition 2.6 inductively:
[TABLE]
where is a ring. Note that polynomial rings over fields are integral domains.
Definition 2.8** (Adjoint elements to a ring).**
When adjoining a number to a ring we obtain the set
[TABLE]
The set together with the following two operations
[TABLE]
and
[TABLE]
where and are the binary operations on the ring, is again a ring, where is the unit of this ring.
Example 2.9**.**
Popular examples of rings include and , as well as sets with adjoined elements like , , where , are primes and denotes the th root of , i. e. . Alternatively, we can adjoin algebraic independent prime root elements with and get an analogous construction.
Remark 2.10**.**
The denotation of resp. are not unique but the constructions of the circuit over the underlying rings are analogous except for the placeholders for the adjoined numbers. For example can denote or or many other rings. Since we only focus on the structure of the tuples, i. e., the coefficients of adjoint elements, or later the underlying circuits, our short notation for for arbitrary is not unique and may differ, e. g. may denote or may denote . In the context of the placeholder notation, the arithmetic of the specific ring must be clear, if it is important.
Definition 2.11** (Field).**
A field is a tuple consisting of a set and two binary operations and such that
- •
- •
- •
is an abelian group (see 2.2)
- •
is an abelian group (see 2.2)
- •
multiplication is distributive with respect to addition:
[TABLE]
We do not need two equations for distributivity since multiplication and addition are both commutative.
Remark 2.12**.**
An alternative characterisation for a field is as a commutative ring where holds and every element is invertible.
We need some ordering on our integral domain . In some cases, like and , we have some natural ordering that we want to use. In other cases, like , we have to construct some ordering. This ordering does not have to be closed under multiplication, we only have to distinguish different numbers from each other. So an ordering on tuples () is possible.
Definition 2.13**.**
A strict total order on a set is a binary relation on which is irreflexive, transitive and total.
Example 2.14**.**
For some field for some prime and a natural number , we write the finitely many elements in a list and then use the lexicographical on this list. For example, let . Then we define as .
There are multiple possibilities for such a over the field of complex numbers. Let and let be the lexicographic order on pairs . Furthermore, let be the lexicographic order on pairs of the form . Then both variants are possible since both distinguish different complex numbers.
Definition 2.15**.**
A strict total order over a ring induces a -function as follows:
[TABLE]
In the following, unless explicitly otherwise specified, the symbol denotes an infinite integral domain with a strict total order on . Most of the rings we consider have a natural ordering. In this case, we omit the ordering symbol.
2.1. Algebraic Circuits over
As this work is a generalization of the well established Boolean circuits, some background in circuit complexity is assumed. Standard literature which introduces this topic is the book by Vollmer [Vol99]. The generalization to algebraic circuits over real numbers were first introduced by Cucker [Cuc92]. In analogy to them, Barlag and Vollmer defined an unbounded fan-in version of algebraic circuits [BV21].
Definition 2.16**.**
We define an algebraic circuit over an integral domain with a strict total order , or -circuit for short, as a directed acyclic graph. It has gates of the following types:
Input nodes
have indegree [math] and contain the respective input values of the circuit.
Constant nodes
have indegree [math] and are labelled with elements of
Arithmetic nodes
have an arbitrary indegree , bounded by the number of nodes in the circuit and are labelled with either or .
Comparison () nodes
have indegree .
Output nodes
have indegree and contain the output value after the computation of the circuit.
Nodes cannot be predecessors of the same node more than once, thus the outdegree of nodes in these algebraic circuits is bounded by the number of gates in the circuit.
During the computation of an algebraic circuit, the arithmetic gates compute their respective functions with the values of their predecessor gates being taken as the function arguments and the comparison gates compute the characteristic function of in the same way. The values of the output gates at the end of the computation are the result of the computation.
In contrast to the classical setting, where we consider words over an alphabet as inputs, and where languages are thus defined to be subsets of the Kleene closure of the alphabet (in symbols, ), we consider vectors of integral domain elements as input. In analogy to , we denote for an integral domain :
[TABLE]
With , we denote the length of , i. e., if then .
Remark 2.17**.**
We will use the term algebraic circuit to describe circuits in the sense of Blum, Cucker, Shub and Smale [Blu+98] rather than arithmetic circuits as e. g. in [BV21] to distinguish them from arithmetic circuits in the sense of Valiant, see e. g. [BCS97]. Valiant circuits are essentially algebraic circuits without -gates [Blu+98, page 350].
Remark 2.18**.**
In the special case , the definition above yields exactly the Boolean circuits.
Definition 2.19**.**
We call the number of gates in a circuit the size of the circuit and the longest path from an input gate to an output gate the depth of the circuit.
Remark 2.20**.**
Unlike the way algebraic circuits with unbounded fan-in gates were introduced previously [BV21], algebraic circuits in this context have comparison gates instead of -gates. This stems from the fact that when dealing with real or complex numbers, we can construct a -function from via Definition 2.15 and the order relation from the -function via
[TABLE]
If we now consider finite integral domains, however, suddenly it becomes less clear how to construct the relation from the function, while the other way around still works by Definition 2.15.
Given that we define circuits and logic fragments relative to an ordering, it is natural for both to have access to this ordering. Therefore we choose to use gates rather than gates. So in the following, all usages of are implicit uses of the order relation as by Definition 2.15.
In the cases which are considered in other literature ( or ), this has no complexity-theoretic impact, since in the emulation of one formalism using the other, we get a linear overhead in the size and constant overhead in the depth of the circuit.
In order to define complexity classes with respect to algebraic circuits, we have to define the function calculated by such a circuit and define the term of circuit families.
Definition 2.21**.**
The (-ary) function computed by an -circuit (with input gates and output gates) is defined by
[TABLE]
where are the values of the output gates of , when given as its inputs.
Definition 2.22**.**
A family of -circuits is a sequence of circuits which contains one circuit for every input length . The function computed by a circuit family is defined by
[TABLE]
The size (resp. depth) of a circuit family is defined as a function mapping to the size (resp. depth) of .
Analogously to the classical case, we say that a set can be decided by a circuit family , if can compute the characteristic function of .
Definition 2.23**.**
The class is the class of sets decidable by -circuit families of size and depth .
Definition 2.24**.**
The class is the class of sets decidable by -circuit families of size and depth , where each arithmetic gate has an indegree bounded by (we call this bounded fan-in).
Remark 2.25**.**
The circuit families we have just introduced do not have any restrictions on the difficulty of constructing any individual circuit given the input length. If it is important to know how hard obtaining a particular circuit is, one can consider so-called uniform circuit families. These families require their circuits to meet restrictions on the difficulties of obtaining them. For more information on uniformity, cf. [Vol99].
Uniformity criteria can be defined for algebraic circuit classes in a similar way. See e. g. [Blu+98, Section 18.5].
2.2. Structures and first-order logic over integral domains
As we want to characterize circuit complexity classes with logical fragments, this work falls broadly under the umbrella of finite model theory, and, in particular, descriptive complexity. Foundational knowledge of these topics is assumed and can be found in the books by Grädel et al., Libkin and Immerman [Grä+07, Lib04, Imm99]. Traditionally, descriptive complexity is viewed as a subdiscipline of finite model theory, since allowing infinite structures often makes problems undecidable. In our setting, however, we want to (carefully) reintroduce infinite structures to our reasoning. For this, we use metafinite model theory, an extension of the finite model formalism first introduced by Grädel and Gurevich [GG98]. A short introduction to metafinite model theory is also featured in the book by Grädel et al. [Grä+07, page 210]. The approach was taken by Grädel and Meer [GM95] to describe some essential complexity classes over real numbers. These descriptions were later extended by Cucker and Meer [CM99], where, among other things, the -hierarchy over real numbers was defined. For the characterization, these papers introduce a so-called first-order logic with arithmetics, which we will adapt to be used in our setting.
To make proofs easier, we use the well known trick that a signature consisting only of functions can emulate any predicates we might want to define via a characteristic function corresponding to the relation the predicate is interpreted as. We can furthermore emulate constants by [math]-ary functions.
Definition 2.26**.**
Let , be finite vocabularies which only contain function symbols. An -structure of signature is a pair where
- (1)
is a finite structure of vocabulary which we call the skeleton of whose universe we will refer to as the universe of and whose cardinality we will refer to by 2. (2)
and is a finite set which contains functions of the form for which interpret the function symbols in .
We will use to refer to the set of all -structures of signature and we will assume that for any signature , the symbols in and are ordered.
Remark 2.27**.**
In this paper, we only consider ranked structures, i. e., structures, in which the skeleton is ordered.
Definition 2.28** (First-order logic over ).**
The language of first-order logic over an integral domain contains for each signature a set of formulae and terms. The terms are divided into index terms which take values in universe of the skeleton and number terms which take values in . These terms are inductively defined as follows:
- (1)
The set of index terms is defined as the closure of the set of variables under applications of the function symbols of . 2. (2)
Any element of is a number term. 3. (3)
For index terms and a -ary function symbol , is a number term. 4. (4)
If , are number terms, then so are , and .
Atomic formulae are equalities of index terms and number terms , inequalities of number terms and expressions of the form , where is a k-ary predicate symbol and are index terms.
The set is the smallest set which contains the closure of atomic formulae under the logical connectives and quantification and where ranges over .
For better readabilty, we will use inequalities of the form and the extensions of equalities and the inequalities and to tuples throughout this paper. Note that these extensions are easily definable from and in first-order logic.
Remark 2.29**.**
We call any element of a number term even though some integral domains can contain elements like , or which are not numbers. Since we want to do some calculations with these elements, we call them numbers, too.
Equivalence of -formulae and sets defined by -formulae are done in the usual way, i. e., a formula defines a set if and only if the elements of are exactly the encodings of -structures under which holds and two such formulae are said to be equivalent if and only if they define the same set.
With the goal in mind to create a logic which can define sets decided by circuits with unbounded fan-in, we introduce new rules for building number terms: the sum and the product rule. We will also define a further rule, which we call the maximization rule. This one is, however, already definable in and we thus do not gain any expressive power by using it. We will use it to show that we can represent characteristic functions in .
Definition 2.30** (Sum, product and maximization rule).**
Let be a number term in which the variables and the variables occur freely and let denote the universe of the given input structure. Then
[TABLE]
is also a number term which is interpreted as . The number terms and are defined analogously.
We call these operators aggregators and for any formula containing aggregators of the above form, the variables in are considered bound in .
Example 2.31**.**
Let be the signature of weighted graphs, i. e. gives the weight of the edge from to or [math] if there is none. Let be a (graph) structure over . Then the following sentence states that there is a node in the skeleton of , for which the sum of its outgoing edges is more than double the sum of the outgoing edges of any other node.
[TABLE]
Observation 2.32**.**
.
Proof.
An occurrence of essentially assures that there exists an element , such that for all elements , and takes the value of . Clearly, this can be defined in fist order logic by a formula of the form . ∎
Furthermore, any characteristic function of a logical formula can be described in . The proof for this runs analogously to that of Cucker and Meer [CM99, Proposition 2], since this proof does not make any use of special properties of the reals.
3.
In this section, we present a proof that captures the class . The proof idea is similar to the proof of the established result by Immerman which characterizes via .
When using logics to check, whether a given -tuple would be accepted by a -circuit, one needs to think about how this -tuple would be interpreted as an -structure . This can be done by interpreting it as the set of the circuit’s input gates along with a single unary function mapping the th input gate to the th input of the circuit. We call this kind of structure a circuit structure.
In the following, we would like to extend by additional functions and relations that are not given in the input structure. To that end, we make a small addition to Definition 2.26 where we defined -structures. Whenever we talk about -structures over a signature , we now also consider structures over signatures of the form . The additional (also ordered) vocabulary does not have any effect on the -structure, but it contains function symbols, which can be used in a logical formula with this signature. This means that any -structure of signature is also an -structure of signature for any vocabulary . The symbols in stand for functions that we will use to extend the expressive power of to capture various complexity classes.
Definition 3.1**.**
Let be a set of finite functions. We will write to denote the class of sets that can be defined by -sentences which can make use of the functions in in addition to what they are given in their structure.
Formally, this means that describes exactly those sets for which there exists a -sentence over a signature such that for each length , there is an interpretation interpreting the symbols in as elements of such that for all -tuples of length it holds that if and only if encodes an -structure over which models when using .
Definition 3.2**.**
We write to denote the set of all functions , where .
Theorem 3.3**.**
Let R be an infinite integral domain. Then .
Proof.
The proof for this theorem works similarly to the construction for [BV21], since this construction does not make use of any special properties of the real numbers.
The basic idea for this proof is that we first show that for any -sentence , we can construct a circuit familiy which accepts its input if and only if the input encodes an -structure that satisfies . This is basically done by mimicing the behaviour of the logical operators of using the available gate types and evaluating the formula level by level. A universal quantifier as in , for instance, is implemented by using a -gate (obtained from as per Definition 2.15) on top of a multiplication gate, which has the circuits for for each in the skeleton of the encoded structure as its predecessors.
To translate the semantics of into a circuit, we can mostly use the same translations as in the proof for the real case, as for the most part only properties of integral domains are used. We need ring properties for most of these translations and in particular for universal quantifiers, we also need commutativity of multiplication and no zero dividers, hence we require integral domains.
We do need to change the translation for existential quantifiers and , however. In the real case, the circuit for is constructed similarly to the universal case with a -gate followed by an addition gate with the circuits for for each in the skeleton as its predecessors. Since there are infinite integral domains with characteristic greater than [math], i. e., where adding a positive amount of elements can yield [math], this would not always produce the desired result. However, we can overcome this easily by translating to and to , as negation, universal quantifiers and are constructible with integral domain properties.
For the converse inclusion, a number term is created when given a circuit family , such that for each , evaluates to the value of gate if is on the th level of the respective circuit . For this construction, with integral domain properties no changes need to be made to the formula in the real setting. ∎
4. Algebraic Circuits and Guarded Functional Recursion
In this section, we generalize the logical characterizations of and by Durand, Haak and Vollmer [DHV18] to the respective complexity classes over integral domains and . We furthermore extend this method to capture the entire and hierarchies.
In their paper, Durand, Haak and Vollmer use what they call guarded predicative recursion to extend first-order logic in order to capture the logarithmic depth circuit complexity classes and . This essentially amounts to a recursion operator, which halves a tuple of variables (in their numerical interpretation) which is handed down in each recursion step. This ensures that the total recursion depth is at most logarithmic. The halving of the variable tuple is performed by using the fact that addition is expressible in if BIT and are expressible [Imm99] in the following way
[TABLE]
Note that we do not define the formula of the halving to be equality, since this is not possible for odd numbers. However, this is not an issue since we only want to bound the worst case recursion depth. In order to capture classes of polylogarithmic depth, we would like to find a suitable factor to replace with, so that the recursion process has polylogarithmic depth as well. As it turns out, for any , we can assure a recursion depth of by using the factor .
Observation 4.1**.**
Any number can be multiplied by the factor exactly times, before reaching .
Proof.
∎
A more general version of this observation can be found in Lemma A.2 in the appendix. Unfortunately, while it is simple to divide by when the BIT predicate is available, it is not at all clear if multiplying by a factor such as can be done in first-order logic.
We can, however, make use of the ability to divide by in order to achieve polylogarithmic recursion depth, by instead of dividing a number, essentially dividing the digits of a base number individually and carrying over once [math] is reached.
Let us take for example the base number . The previously mentioned process is illustrated in the table in Figure 1. The table is supposed to be read from top to bottom and then from left to right.
We divide the digits of from the least to most the significant digit until [math] is reached. So, the first step is dividing the rightmost digit of by , getting from to . After two more divisions of that kind, we reach [math] and in the subsequent step we reset the rightmost digit and divide the second digit once. This works in a similar way to counting down, where instead of taking away in each step, we divide by and carry over in an analogous way. Notably, reaching from takes steps. This is no coincidence: It can easily be shown that for any base number of digits, this sort of process reaches the smallest possible element after less than steps.
In order to perform divisions by , as stated before, we need to be able to express the BIT predicate in our logic. In the classical case with natural numbers, BIT is defined as follows, where we assume the most significant bit of ’s binary representation to be the bit at index :
Definition 4.2**.**
Let the relation be defined as follows:
[TABLE]
Since we wish to logically characterize languages decided by circuit families, it is useful to briefly talk about representation of numbers in descriptive complexity. In descriptive complexity, tuples of elements from a finite, ordered domain are often associated with numbers. This is frequently done by interpreting the tuple as a base number with each element of the tuple representing its position in the ordering of .
Example 4.3**.**
For example, let be ordered such that . Then the tuple would be interpreted as the base number , which would correspond to in decimal.
Whenever we talk about the numerical interpretation of a tuple, we refer to this sort of interpretation. Given that we are in this setting, we adjust the definition of BIT to suit our purposes as follows, where again, the most significant bit of ’s binary representation is the bit at index :
Definition 4.4**.**
For any ranked structure with universe , let the relation be defined as follows:
[TABLE]
With the BIT predicate and an order relation, we are now able to express division by in first-order logic. We use the fact that whenever BIT and an order are available, we can express multiplication and addition of numerical interpretations of tuples [Imm99]. This result was shown for plain first-order logic, and since our two-sorted first-order logic is equivalent to first-order logic if the secondary component is ignored, we can apply it here as well.
We express division by as follows:
[TABLE]
Note again, that since the numerical interpretations of tuples are natural numbers, expressing is really as good as we can do, since would not work for odd numbers.
Next, we will turn to defining the recursion operator which we have alluded to in the beginning of this section. First, we need a little bit of additional notation, i. e., relativized aggregators. A relativization of an aggregator is a formula restricting which elements are considered for the aggregator.
Notation 4.5**.**
For a number term and a formula we write
[TABLE]
as a shorthand for
[TABLE]
Analogously we write
[TABLE]
for
[TABLE]
and
[TABLE]
as a shorthand for
[TABLE]
We now define the operator and logics extended by of the form . The idea is to mimic the behavior demonstrated in Figure 1.
Definition 4.6** ().**
Let be a set of functions such that BIT is definable in and let be or a logic obtained by extending with some construction rules (such as the sum or the product rule as per Definition 2.30).
For , the set of -formulae over is the set of formulae by the grammar for over extended by the rule
[TABLE]
where is a formula, is a function symbol and is a number term with free variables such that all for contain the same (positive) number of variables and each (sub-)number term involving the symbol in
- (1)
is of the form , where are in the scope of a guarded aggregation
[TABLE]
with , with not containing any relation symbols for relations given in the input structure and 2. (2)
never occurs in the scope of any aggregation (or quantification) not guarded this way.
The function symbol is considered bound in
[TABLE]
The semantics for the operator are defined as follows: Let be a formula over with the single occurrence
[TABLE]
and let . Then, the operator which is applied to the formula , namely , defines the interpretation of in in the following way: For all tuples of elements of the universe of with the same arities as , respectively,
[TABLE]
This means that the formula holds for a tuple with the same arity as if and only if where is the interpretation of as defined by the operator. Semantics of formulae with several operators are defined analogously.
Note that the th tuple does not get restricted by the guarded aggregation.
Having defined the operator, it remains to be shown that it indeed ensures polylogarithmic recursion depth in the way that we want it to.
Lemma 4.7**.**
Let and let be a formula containing a operator. Then the recursion depth of the operator is bounded by , where is the size of the universe of .
Proof.
Let be the size of the universe of the structure under which the operator is interpreted. The bound for the recursion depth of the operator stems from the relativization which guards the aggregated variables. Let be an occurrence of a operator. Then the variables in are in the scope of a guarded aggregation of the form
[TABLE]
as per Definition 4.6.
Let be the numerical interpretation of for all . We interpret the tuple as a natural number of base where the th digit of is .
First, observe that in this interpretation, the relativization of the variables used in the recursive call ensures that strictly decreases in each step. The big conjunction makes sure that there is an index , such that , which means that the numerical interpretation of is at most half of the numerical interpretation of . It also ensures that all tuples with smaller indices (i. e. the more significant tuples in the interpretation of as a base number) do not increase.
Since each of the tuples (in their numerical interpretation) can only get halved at most times before reaching [math], it takes at most recursion steps until a tuple other than the th has been halved. In the worst case that is the th tuple. This process can then be repeated at most times, before the tuple at the next lower index gets halved. In total, in the worst case, it takes recursion steps until the th tuple gets halved in this process.
This means, that after recursion steps, the first tuple has reached [math]. Therefore, the total maximum recursion depth is .
This process can be thought of as counting down a base number. The idea for it has already been visualized in Figure 1. It is also explicitly illustrated in Figure 2 and Figure 3, for a sequence which we will define shortly in Definition 4.12 to make use of exactly this kind of process. ∎
Since our final goal is to characterize both and , we need to also define aggregators which model the properties of circuits. For this purpose, we introduce bounded aggregators, i. e., relativized aggregators where we only consider the two elements of maximal size meeting the condition in the relativization.
Definition 4.8**.**
We define the bounded aggregators and . They are used in the same way as the aggregators defined earlier in Definition 2.30. The semantics are defined as follows:
[TABLE]
The bounded aggregators and are defined analogously.
With this bounded aggregation, we can now define a slightly weaker version of the guarded functional recursion from Definition 4.6, which we call bounded guarded functional recursion . This allows us then to define logics of the form or .
Definition 4.9** ().**
A formula is in if the same conditions as in Definition 4.6 are met, but instead of a guarded aggregation in (1), we require a bounded guarded aggregation.
Our goal in the following is to characterize the and hierarchies using first-order logic and guarded functional recursion. For that purpose, we now define a sequence which we will later use as part of the numbers of our gates in order to encode the gates’ depth into their numbers. The idea behind the construction of of this sequence will be that for a circuit family with depth bounded by , each of the sequence’s elements is essentially a -digit base number with each digit being encoded in unary and padded by zeroes. For readability purposes, we will refer to this encoding simply as a unary encoding. The sequence can then be seen as counting down to [math] in that interpretation. This will then result in a length of for fixed . We begin by introducing our conventions regarding unary encodings of numbers.
Definition 4.10**.**
Let such that . Then we will refer to the function defined as
[TABLE]
as the (length ) unary encoding of .
Definition 4.11**.**
For any binary string of the form
[TABLE]
for some , we define the function defined as
[TABLE]
and call the value of the unary encoding .
We now proceed to define the aforementioned sequence which we will later use to essentially encode our circuit’s gates’ depth into their gate numbers.
Definition 4.12**.**
For each , we define the sequence as follows. For readability purposes we leave out the arguments in the definition of the sequence and only write instead of .
- (1)
Each element of consists of tuples (), each of which is the length unary encoding of a number in . 2. (2)
(I. e., for all with .) 3. (3)
for all where . 4. (4)
for .
Examples for the sequence can be seen in Figures 2 and 3.
Remark 4.13**.**
Note that substracting the value in this unary encoding can be seen as an integer division by in binary. This will become useful later when putting this into the context of guarded functional recursion with BIT.
Note that the length (i. e. the number of elements) of is
[TABLE]
and the length of is
[TABLE]
This is no coincidence. Next, we show that this observation holds in general.
Lemma 4.14**.**
Let . Then, has length .
Proof.
Since for each element in the successor rule can be interpreted as subtracting from when is seen as a base number with digits, we are starting at the largest possible element in that sense (i. e. , which would correspond to ) and we are counting down to the lowest possible element (i. e. , corresponding to [math]), there are exactly elements in . ∎
The remaining problem that stands in the way of using the sequence for the numbering of gates in descriptions for circuits is that the length of the elements in depends on (which will be the number of input gates of our circuit). However, we can remedy this, since we essentially have access to base numbers in the description for a circuit with input gates (by virtue of interpreting circuit inputs as circuit structures). Combining those with the BIT predicate and now interpreting the unary encoded tuples in elements of as binary numbers allows us to encode elements of using a constant number of digits.
Observation 4.15**.**
Let and . The number can be encoded by a base number of length .
Proof.
The largest possible number of that form is , which corresponds to ‘\underbrace{{n-1}\dots n-1}_{\text{c times}}’ in base . Therefore, can be encoded with base digits and thus also all smaller natural numbers can be encoded in this way. ∎
We can thus encode the binary valuations of tuples in elements of as base numbers of length . Therefore, each element of can be encoded using base numbers of length (or base digits).
Before we proceed to using the sequence for circuit descriptions, we need one more lemma which provides a useful property of resp. circuits. We would like to be able to talk about the depth of gates, i. e., the distance of a gate to the input gates of the circuit. For this reason, we will establish the fact that for the circuit families we investigate, circuits exist where for each gate , each input- path has the same length.
Lemma 4.16**.**
Let be in or via the circuit family . Then there exists a circuit family deciding , such that for all and each gate in , each path from an input gate to in has the same length. We call a balanced DAG.
Proof.
Let be in or via . For each circuit , we construct a circuit , such that and for each gate in , all input--paths in have the same length. We transform into by creating paths of dummy gates to replace edges that go over more than one level of depth.
Let the depth of be bounded by and let its size be bounded by . We proceed by structural induction over the depth of gates in , i. e., the maximum length of paths from an input gate to .
:
Each gate at depth is a direct successor of an input gate. Therefore, no changes need to be made, since all gates at depth only have input- paths of length and therefore have the desired property.
:
For each gate at depth , all predecessors are gates of depth for which it holds that all paths from input gates to them are of the same length. Keep all those predecessors at depth as they are and replace the edge from predecessors of smaller depths to by a path of dummy (unary addition) gates of length . Now all paths from input gates to have exactly length and we only added at most gates per predecessor of . In total, the number of dummy gates added for is bounded by .
The resulting circuit is . Since addition gates with only a singular predecessor are essentially identity gates, the value of each gate in any computation of remains the same. Thus, .
Additionally, for each gate in , we add at most gates to arrive at . Therefore, the size of is bounded by . The depth of does not change, since we only ever add gates, when longer paths within exist so that they end up at the same length.
In total, computes the same function as – and thus decides – and has the property that for each of its gates , all input--paths have the same length. ∎
As previously mentioned, whenever we are dealing with balanced DAGs, we will refer to the unambiguous length from input gates to a gate as the depth of .
Now we will turn to a lemma which will then finally enable us to use the previously defined sequence to encode our gates’ depth into their circuit numbers. This, combined with Lemma 4.14, provides us with a way to logically ensure the polylogarithmic depth of a circuit given as a circuit structure.
Lemma 4.17**.**
Let be in or via the circuit family . Then there exists an (resp. ) circuit family deciding with depth bounded by , such that the gates of each circuit of are numbered as base numbers, where for each path from an input gate to the output gate, the first digits encode elements of in the order that they appear in the sequence.
The numbering after the first digits can be chosen arbitrarily.
Proof.
Let or via the circuit family the depth of which is bounded by . Without loss of generality, let the circuits of be balanced DAGs as per Lemma 4.16. That means that for each circuit in , for each gate in , the length of all paths from input gates to is the same. Let be such that is larger than the depth of (which is bounded by ). We pad each path in to length by replacing each edge from an input gate to a gate in by a path of dummy gates of length so that the resulting circuit has exactly depth .
We now use any base numbering for the gates of and for each gate prepend the th element of to the number of . Since we made sure that each input-output-path in has length exactly , we can encode exactly the sequence in the numbers of each input-output-path. So now for each input-output-path, the first digits of gate numbers encode the elements of in the order that they appear in the sequence. ∎
With the normal form from Lemma 4.17 and the previous definitions, we can now turn to a theorem characterizing and logically by tying it all together.
Theorem 4.18**.**
a**
- (1)
** 2. (2)
**
Proof.
We start by showing the inclusions of the circuit classes in the respective logics and will then proceed with the converse directions.
Step 1: :
Let via the nonuniform circuit family and let the depth of be bounded by . We construct a sentence defining . As the circuit input is interpreted as a circuit structure, the signature of contains only the single unary function symbol .
We define the following additional relations and functions which will essentially encode our given circuits. We will have access to them because of the extension of our logic and we use relations here instead of functions for ease of reading, since we essentially have access to relations in functional structures if we consider the respective characteristic functions of the relations instead.
- •
is an addition gate.
- •
is a multiplication gate.
- •
is a -gate, the left predecessor of which is lexicographically lower than the right predecessor.
- •
is an input gate.
- •
is a successor gate of .
- •
is the output gate.
- •
is a constant gate.
- •
is the value of if is a constant gate and otherwise.
Without loss of generality let all circuits of be in the normal form of Lemma 4.17 and let the numbering of be such that the last digit of the number of the th input gate is for . Recall that this means that for each gate number of a gate represented as a tuple , the first elements of encode the th element of . The following sentence defines :
[TABLE]
where is defined as follows (with denoting the th -long subtuple in the long prefix of , which, as per the normal form of Lemma 4.17 encodes the th tuple of an element of ):
[TABLE]
Here, the relations for give information about the gate type of the gate encoded by and are provided by the -extension of . They are interpreted as mentioned above. The BIT predicate is provided in the same way.
We will now prove that does indeed define . Let be the input to . We will show that for all , where is the encoding length of a gate in , the value of the gate encoded by in the computation of when is given as the input is . Let be the gate encoded by . We will argue by induction on the depth of the gate , i. e., by the distance between and an input gate.
: If , then is an input gate. Therefore, the only summand in that is not trivially [math] is the fourth one, which is equal to (which is the value of the th input gate).
: Since , is not an input gate. This means that there are the following 5 possibilities for :
- (1)
is an addition gate: In that case, the only summand in which is not trivially [math] is the first one. All predecessors of have a number, the first digits of which are the successor of the first digits of in the sequence because of the normal form of Lemma 4.17. Additionally, the relativization ensures that the gate encoded by in the respective summand has exactly the successor in the sequence of ’s first digits in its first digits. This means that by the induction hypothesis
[TABLE]
yields exactly the sum of all the values of predecessor gates of . 2. (2)
is a multiplication gate: Analogously to the above case,
[TABLE]
yields exactly the product of all predecessor gates of . 3. (3)
is a gate: In that case, the relativization
[TABLE]
makes sure that is the maximum gate number of a predecessor of and
[TABLE]
makes sure that is the gate number of the other predecessor of and that therefore is the value of , which is exactly the value of in the computation of . 4. (4)
is a constant gate: Since returns exactly the value of , and that value is taken by . 5. (5)
is the output gate: In that case, only has one predecessor and thus
[TABLE]
ensures that takes the value of that predecessor, since there is only one element matching the relativization.
Finally, by
[TABLE]
we make sure that there exists an output gate which has the value at the end of the computation.
Step 2: :
The proof for this inclusion follows in the the same as the proof for the -case, by just replacing all guarded aggregations in the formulae by bounded guarded aggregations.
Step 3: :
Let via a formula over some signature and let there be only one occurrence of a operator in . This proof easily extends to the general case. This means that is of the form
[TABLE]
We now construct an circuit family deciding .
We first construct an family evaluating without the occurrences of as in Theorem 3.3. This is possible, since is an formula over and by Theorem 3.3, there is such a circuit family for .
Next, we explain how we build an circuit family for the whole formula from this point. For this, we need to construct an circuit family computing the value of for each pair with for some and , where the length of the tuple is exactly the exponent of the polylogarithm bounding the circuit depth. Notice, that is an number term and can therefore be evaluated by an circuit family, except for the occurrences of . We now obtain by taking the th circuit of all those (polynomially many) circuit families and for all replacing the gate labeled by the output gate of the circuit computing .
Since all occurrences of are in the scope of a guarded aggregation
[TABLE]
the number of steps from any before reaching , terminating the recursion, is bounded by as per Lemma 4.7.
Since each such step – computing , when given values of the next recursive call – is done by an circuit and therefore has constant depth, in total, any path from the first recursive call to the termination has length in . Since the starting circuit deciding had constant depth, the circuit we constructed now has polylogarithmic depth in total. And given that we only added polynomially many subcircuits with polynomially many gates each, the whole circuit is an circuit deciding .
For the general case of several operators, we construct a circuit for each operator in the same way and connect them to the circuit evaluating .
Step 4: :
This case can be proven analogously to the case for . Instead of families for evaluating and , we now need to use families. With this, we have logarithmic depth for evaluating , which would generally be a problem, since repeating this times would yield a family. However, by definition, there are no occurrences of in the scope of unbounded aggregators or quantifiers. For the bounded aggregators, we still construct circuits for all possible values of the aggregated variables, but we only connect the output gates of the maximum two circuits satisfying the relativization. We can do this, since, as does not contain function or relation symbols given in the structure, we can predetermine which circuits will match the relativization and therefore hardwire the connections. In general, formulae without unbounded quantifiers or aggregators can be evaluated in . Therefore, the gates marked only occur at constant depth in the subcircuits for . This means, that in total, the construction leads to a depth in . ∎
As mentioned previously, the basis of the idea for guarded functional recursion was the guarded predicative recursion used for plain first-order logic [DHV18]. The same extension to polylogarithmic recursion depth that was showcased in this paper for can be applied to , yielding the following results. (A formal definition of is presented in the appendix as Definition B.2).
Corollary 4.19**.**
a**
- (1)
** 2. (2)
**
5. Relationship between versions of over different integral domains
Intuitively, a circuit deciding a problem in should also be able to simulate circuits deciding problems in, for example, and . Furthermore, we should be able to simulate an -circuit by an -circuit by simulating the operations defined in the integral domain by operations of tuples of . To formalise this intuition, we propose the notion of -simulation maps.
Definition 5.1**.**
Let be two functions and let be a complexity class with .
A -simulation map from an integral domain to an integral domain is an injective function such that the following holds:
For all and there exists an and a language such that for all ) with for all :
[TABLE]
If there exists a -simulation map from an integral domain to an integral domain , we also write . The relations and are defined analogously.
Similar to the formalism of reductions in classical complexity theory, the relation induced by is reflexive and transitive. Since in this work, the main focus is on the and hierarchies, we will proceed to restrict ourselves to these classes. But note that the simulation methods we show trivially extend to larger complexity classes.
The formalism essentially divides our integral domains in a three-tier hierarchy. The first tier in this hierarchy consists of the complexity classes over finite integral domains, the second tier consists of the classes over integral domains which are simulatable by and the third tier consists of classes over integral domains which are simulatable by . In this setting, a complexity class over a certain integral domain is able to simulate the complexity classes over integral domains in the same tier or below. To make this explicit, we show the following three equalities:
Theorem 5.2**.**
The following three equations hold:
- (1)
* for all prime powers and .* 2. (2)
* for all .* 3. (3)
* for all .*
Proof.
We split the proof in two main parts: the finite case, in which simulations of integral domains are trivial, and the infinite case, where we have to be more careful about the new operations our simulating circuits execute to uphold that the structure the circuits simulate are still integral domains.
The finite case. The simulation of finite integral domains is quite trivial. For where , choose the length of tuples that the -circuit uses to be the smallest such that holds. Map the elements to the first elements in and define addition an multiplication tables of constant size which simulate the addition and multiplication in .
The infinite case. We will prove that for any fixed . Note that the following proof does not depend on the countability of the set, so the proof for the uncountable case runs analogously. The direction is trivial. For the other direction, note that when simulating infinite integral domains, we can no longer hard-code the addition and multiplication tables in a trivial way. Furthermore, integral domains are not closed under cartesian products, since for two integral domains , we have for that using componentwise multiplication. We fix this by still using -tuples to emulate the adjoint elements and using componentwise addition, but adapting multiplication so that it simulates multiplication of two elements with adjoint elements, where the -th index of the tuple stands for the -th power of the adjoint element, which we call here. Explicitly, we use the integral domain , where is componentwise addition, and is defined as follows:
If we want to multiply two tuples of length
[TABLE]
we simulate the multiplication in the original, adjoint integral domain
[TABLE]
by constructing the following matrix of constant size which corresponds to expanding the multiplication:
[TABLE]
Observe that, due to the fact that , every entry of the matrix contributes to the term at index in the tuple. The entry of the resulting tuple at index is thus
[TABLE]
Theorem 5.3**.**
The following three equations hold:
- (1)
* for all prime powers and .* 2. (2)
* for all .* 3. (3)
* for all .*
Proof.
We use the strategy from the proof of Theorem 5.2, and show that unbounded addition and multiplication can be realized without a significant increase in the complexity.
For given tuples of length
[TABLE]
the simulation of unbounded addition by unbounded componentwise addition of tuples is straightforward. Observe that for unbounded multiplication, simply iterating the binary multiplication would result in linear depth. But similar to the method for binary multiplication, we can compute in advance which values contribute to a given index of the resulting tuple. And since the value of a tuple entry in the result can only depend on the values , to simulate an unbounded multiplication gate, we need only an unbounded multiplication gate with a linear number of predecessors (but possibly exponential increase in the wire complexity). ∎
Corollary 5.4**.**
For all , we have and .
Proof.
Observe that . ∎
Lemma 5.5**.**
For all , we have and .
Proof.
For (resp. ), take and for (resp. ), take , where . ∎
Lemma 5.6**.**
.
Proof.
We use the fact that is a trancendental field extension of , i. e., there is no finite set of numbers which we can adjoin to in order to get . In our setting this mean that we can not simulate all numbers by a set of finite tuples of numbers where . ∎
6. Conclusion
In this paper, we introduced algebraic complexity classes with respect to algebraic circuits over integral domains. We showed a logical characterization for and further characterizations for the and hierarchies, using a generalization of the operator of Durand, Haak and Vollmer [DHV18]. We constructed a formalism to be able to compare the expressiveness of complexity classes with different underlying integral domains. We then showed that using this formalism, we obtain a hierarchy of sets of complexity classes, each set being able to “simulate” the complexity classes from the sets below.
For future work it would be interesting to investigate the logical characterizations made in this paper in the uniform setting. We know that for the real numbers, the characterization holds both non uniformly and for uniformity criteria given by polynomial time computable circuits (-uniform), logarithmic time computable circuits (-uniform) and first-order definable circuits (-uniform) [BV21]. We believe that the results we presented hold here in analogous uniform settings as well, though this would need to be further examined.
Another open direction is to find interesting problems (potentially even complete) for these new complexity classes. This could even provide new insights for the classical case.
A promising approach to the separation of algebraic circuit complexity classes could be an adaption of the approach taken by Cucker, who showed that the problem , which essentially asks whether a point lies on a fermat curve, seperates the (logarithmic time uniform) -classes [Cuc92]. The same proof could also hold for the -classes.
Another model deserving of the name “algebraic circuit” are arithmetic circuits in the sense of Valiant [Val79]. This model is similar to the model presented here, with the exception that generally, only addition and multiplication gates are permitted. Maybe the ideas presented in this paper can lead to further insights with regards to this model of computation as well.
In the Boolean case, in addition to the and hierarchies, one commonly investigated hierarchy is the so called hierarchy. This hierarchy is defined by bounding the fan-in of only one gate type, i. e., either the conjunction or the disjunction gates. It is known that it does not make a difference in that setting which gate type is bounded. A possible next step is to define a sensible analogue of the SAC hierarchy in the algebraic setting. We believe that in the algebraic case, it does make a difference which gate type we bound. This model could then possibly be useful to investigate algebraic structures where the respective operations do not adhere to the same axioms.
Appendix A Bounding circuit depth
Definition A.1**.**
Let be a circuit and let be the set of all gates with . Then we call the th layer of .
Lemma A.2**.**
Let be a circuit family, a sublinear function and the number of gates at layer for a circuit . Furthermore, let .
A circuit has depth if we request that for every layer , the inequality holds.
Proof.
We want to bound the depth of the circuit (that is, the number of layers ) by the sublinear function . For any input size , we therefore set . Furthermore, if we require that the inequality holds, the circuit reaches its maximum depth when holds, since the factor of is applied times, once for each layer. Substitution yields
[TABLE]
Corollary A.3**.**
A circuit has depth if we request that for every layer , the inequality holds.
Appendix B Guarded Predicative Recursion
Notation B.1**.**
Similarly to the relativized aggregators in Notation 4.5, for relativized quantifiers, we write
[TABLE]
as a shorthand for and
[TABLE]
as a shorthand for .
For a -formula and a relation variable , we write if does not occur in the scope of a negation in .
Definition B.2** ().**
Let be a set of relations such that BIT is definable in . The set of -formulae over is the set of formulae by the grammar for -formulae over extended by the rule
[TABLE]
where and are -formulae over , are tuples of variables, is a relation variable and each atomic sub-formula involving in
- (1)
is of the form , the are in the scope of a guarded quantification
[TABLE]
with , with not containing any relation symbols for relations given in the input structure and 2. (2)
never occurs in the scope of any quantification not guarded this way.
The semantics for are defined analogously to the semantics for in Definition 4.6.
The reference list from the paper itself. Each links out to its DOI / PubMed record.
- 1[Alu 09] Paolo Aluffi “Algebra: Chapter 0”, Graduate studies in mathematics American Mathematical Society, 2009
- 2[BCS 97] Peter Bürgisser, Michael Clausen and Mohammad Amin Shokrollahi “Algebraic complexity theory” 315 , Grundlehren der mathematischen Wissenschaften Springer, 1997
- 3[Blu+98] Lenore Blum, Felipe Cucker, Michael Shub and Steve Smale “Complexity and Real Computation” Springer New York, 1998 URL: https://doi.org/10.1007/978-1-4612-0701-6 · doi ↗
- 4[Bür 13] Peter Bürgisser “Completeness and reduction in algebraic complexity theory” Bd. 7. Springer Science & Business Media, 2013
- 5[BV 21] Timon Barlag and Heribert Vollmer “A Logical Characterization of Constant-Depth Circuits over the Reals” In Logic, Language, Information, and Computation - 27th International Workshop, Wo LLIC 2021, Virtual Event, October 5-8, 2021, Proceedings 13038 , Lecture Notes in Computer Science Springer, 2021, pp. 16–30 DOI: 10.1007/978-3-030-88853-4˙2 · doi ↗
- 6[CM 99] Felipe Cucker and Klaus Meer “Logics Which Capture Complexity Classes Over The Reals” In J. Symb. Log. 64.1 , 1999, pp. 363–390 URL: https://doi.org/10.2307/2586770 · doi ↗
- 7[Cuc 92] Felipe Cucker “P ℝ ℝ {}_{\mbox{$\mathbb{R}$}} ≠ \neq NC ℝ ℝ {}_{\mbox{$\mathbb{R}$}} ” In J. Complexity 8.3 , 1992, pp. 230–238 URL: https://doi.org/10.1016/0885-064X(92)90024-6 · doi ↗
- 8[DHV 18] Arnaud Durand, Anselm Haak and Heribert Vollmer “Model-Theoretic Characterization of Boolean and Arithmetic Circuit Classes of Small Depth” In Proceedings of the 33rd Annual ACM/IEEE Symposium on Logic in Computer Science , LICS ’18 Oxford, United Kingdom: Association for Computing Machinery, 2018, pp. 354–363 DOI: 10.1145/3209108.3209179 · doi ↗
