# DeepSeq: Deep Sequential Circuit Learning

**Authors:** Sadaf Khan, Zhengyuan Shi, Min Li, Qiang Xu

arXiv: 2302.13608 · 2023-11-14

## TL;DR

DeepSeq introduces a graph neural network framework tailored for sequential circuit representation learning, leveraging temporal correlations and multi-task training to improve downstream tasks like power estimation.

## Contribution

The paper presents DeepSeq, a novel GNN-based framework specifically designed for sequential netlist learning with a dual attention mechanism and multi-task training.

## Key findings

- DeepSeq outperforms existing GNN models on benchmark circuits.
- It effectively generalizes to downstream power estimation tasks.
- The dual attention mechanism enhances learning efficiency for sequential circuit features.

## Abstract

Circuit representation learning is a promising research direction in the electronic design automation (EDA) field. With sufficient data for pre-training, the learned general yet effective representation can help to solve multiple downstream EDA tasks by fine-tuning it on a small set of task-related data. However, existing solutions only target combinational circuits, significantly limiting their applications. In this work, we propose DeepSeq, a novel representation learning framework for sequential netlists. Specifically, we introduce a dedicated graph neural network (GNN) with a customized propagation scheme to exploit the temporal correlations between gates in sequential circuits. To ensure effective learning, we propose to use a multi-task training objective with two sets of strongly related supervision: logic probability and transition probability at each node. A novel dual attention aggregation mechanism is introduced to facilitate learning both tasks efficiently. Experimental results on various benchmark circuits show that DeepSeq outperforms other GNN models for sequential circuit learning. We evaluate the generalization capability of DeepSeq on a downstream power estimation task. After fine-tuning, DeepSeq can accurately estimate power across various circuits under different workloads.

## Full text

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## Figures

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## References

33 references — full list in the complete paper: https://tomesphere.com/paper/2302.13608/full.md

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Source: https://tomesphere.com/paper/2302.13608