# MUX64, an analogue 64-to-1 multiplexer ASIC for the ATLAS High   Granularity Timing Detector

**Authors:** Zifeng Xu, Li Zhang, Xing Huang, Qiyu Sha, Zhenwu Ge, Yimin Che, Datao, Gong, Suen Hou, Jie Zhang, Tiankuan Liu, Zhijun Liang, Lei Zhang, Jingbo Ye,, Ming Qi

arXiv: 2302.12436 · 2023-03-29

## TL;DR

The paper introduces MUX64, an analogue multiplexer ASIC designed for the ATLAS HGTD, demonstrating reliable performance and minimal degradation after accelerated aging tests.

## Contribution

This work presents the design, fabrication, and testing of a novel 64-to-1 analogue multiplexer ASIC for high-energy physics detectors.

## Key findings

- Successful fabrication of 280 ASIC chips.
- Negligible performance degradation after 16 days at 85°C.
- Reliable selection and transmission of 64 analog signals.

## Abstract

We present the design and the performance of MUX64, a 64-to-1 analogue multiplexer ASIC for the ATLAS High Granularity Timing Detector (HGTD). The MUX64 transmits one of its 64 inputs selected by six address lines for the voltages or temperatures being monitored to an lpGBT ADC channel. The prototype ASICs fabricated in TSMC 130 nm CMOS technology were prepared in wire-bonding and QFN88 packaging format. A total of 280 chips was examined for functionality and quality assurance. The accelerated aging test conducted at 85 degrees celsius shows negligible degradation over 16 days.

## Full text

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## Figures

21 figures with captions in the complete paper: https://tomesphere.com/paper/2302.12436/full.md

## References

8 references — full list in the complete paper: https://tomesphere.com/paper/2302.12436/full.md

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Source: https://tomesphere.com/paper/2302.12436