Bus Admittance Matrix Revisited: Is It Outdated on Modern Computers?

TL;DR

This paper compares the computational efficiency of the traditional bus admittance matrix method with an element-wise approach in power network modeling, revealing that the matrix method may be outdated on modern CPUs with wide vector support.

Contribution

It provides a performance analysis showing the admittance matrix is often slower than element-wise methods on modern hardware, challenging traditional assumptions.

Findings

Admittance matrix method is slower than element-wise method on large power grids.

Wide vector instructions and memory speed significantly impact computational performance.

The study predicts the future trend favoring element-wise methods on modern processors.

Abstract

Bus admittance matrix is widely used in power engineering for modeling networks. Being highly sparse, it requires fewer CPU operations when used for calculations. Meanwhile, sparse matrix calculations involve numerous indexing and scalar operations, which are unfavorable to modern processors. Without using the admittance matrix, nodal power injections and the corresponding sparse Jacobian can be computed by an element-wise method, which consists of a highly regular, vectorized evaluation step and a reduction step. This paper revisits the admittance matrix from the computational performance perspective by comparing it with the element-wise method. Case studies show that the admittance matrix method is generally slower than the element-wise method for grid test cases with thousands to hundreds of thousands of buses, especially on CPUs with support for wide vector instructions. This paper also analyzes the impact of the width of vector instructions and memory speed to predict the trend for future computers.